Hi all:
For example, there are two interfaces can access the same memory: AHB,AXI.Now they have their own package: ahb_env_pkg and axi_env_pkg. ahb_env_pkg includes ahb_read_sequence and ahb_write_sequence. axi_env_pkg includes sequences like ahb.
Now in a random operation case, it must be avoid that assert axi read memory after a ahb write the same memory address in min_read_after_write time, because the data maybe haven’t been writen in memory yet. So there should be built a communocation between ahb sequence and axi sequence or there driver. How to realize it?
Thanks a lot!
I think you can use the virtual sequence to constraint the relationship of the different seq such as AXI or AHB seq. In the virtual sequence, you can specify the delay between the ahb seq and axi seq easily. If you use the virtual seq, you should implement the virtual sequencer for the seq.
In reply to haitao73:
Thank you for reply. Well, it seemed that I didn’t express the situation clearly， please allow me to make an example:
DUT has two types of interface:ahb & axi. Now ahb send a size_16_bits incr4 WRITE transfer with address:0x12, 0x14, 0x16, 0x18,begin at time 0ns, end at time 8ns. At time 4ns, axi send a size_32_bits READ transfer, starting address is 0x10, length is 2.
Because ahb & ahi has a different data path delay, it’s hard to determine which one arrive internal memory port first. If ahb first, the axi will read the updated data from memory in DUT, otherwise it will read the data before ahb updating. But reference model is non-time-consumption, the axi will always read the updated data out from memory in model. So it’s necessary to avoid read the same addreas whice have been writen during a short time span.
I think it’s difficult to ganerater the specific transaction to each driver. Also set a previous operation flag is not the solution.
In reply to seabeam:
Yes, I think if you want your reference model behaviour correctly, you can construct the system bus BFM in your scorboard and the BFM have the same
architecture, arbitration, etc. whith your design. But it isn’t sample, because you need consruct the ahb and axi BFM and the ahb2axi bridge BFM.
In reply to haitao73:
It’s a tough work. Maybe set up a address database then drop the transcation…
Thanks a lot!
In reply to seabeam:
or you can build a monitor for recording your internal memory port’s transaction, and put the transaction from axi and ahb as the input of your scorboard,
I think the work is easier.