Bit of a newbie question: If you have a block under test that you only access via a host interface (say USB, SPI, JTAG, PCEe, I2C, etc.) and you wish to encapsulate the equivalent of a ‘host driver’ intelligence in a class object where does this class/object reside in the UVM architecture? This object would be used by multiple test sequences.
For example, suppose you have an SoC and the processor has a debug module that is register-set accessible. This ‘driver’ object might have functions to enable breakpoints, tracing, dumping, etc. The calling test sequence can be insulated from the details and register manipulations and this object could be shared among multiple test sequences. The calling sequence would merely hand it the host interface driver object (USB, etc.) and then various high-level commands.
Thanks, T