While generating constrained random data, how can we ensure that a given value is not generated more than once? I want to generate unique addresses for my write sequence to memory.
Use “randc” on the address variable.
In reply to sk_verifier:
I read that a randc variable should not be more than 16 bits. My address can be 32 or 64 bits wide. Do you know any other alternative?
In reply to ssingh:
You can have a queue of addresses that you have written to, and have a constraint
rand unint64 address;
uint64 list[$];
constraint not_in_list {!(address inside {list};}
function void post_randomize()
list.push_back(address);
endfunction
In reply to dave_59:
Chris Spear’s book “SystemVerilog for Verification” has some examples in Chapter 6 - but that is still limited by the randc bit-limitation. The limitation is going to vendor dependent and I think you have to take control of the uniquification. Sorry I don’t have a ready example.
In reply to ssingh:
BTW, someone else asked about doing writes and read backs. You can do this by making the list an associative array.
rand bit wr_mode;
rand unint64 address;
uint64 list[unint64];
constraint write_10_ahead {list.size() < 10 |-> wr_mode == '1;}
constraint not_in_list {wr_mode |-> !(address inside {list};}
constraint in_list {!wr_mode |-> (address inside {list};}
function void post_randomize()
if (wr_mode)
list[address] = address; // write adds address to list
else
list.delete(address); // read removes address from list
endfunction
In reply to dave_59:
@dave_59 - Thanks. I prefer the last solution with the queue as order of the adresses in the read sequence stays same as the write sequence. This enables me to use an in-order comparator in the scoreboard. If I use an associative array, it sorts the addresses which I give as indexes.