On the Fly reset in Testbench

Hi,

I am trying to implement changes to my Test bench to accomodate on the fly reset so it can complete/kill what it is doing. The general idea is from this paper.

On the Fly reset

I am getting this Error. Can any one help?

UVM_FATAL @ 1010: uvm_test_top.env.agt.sqr [uvm_test_top.env.agt.sqr] Item_done() called with no outstanding requests. Each call to item_done() must be paired with a previous call to get_next_item(). I am assuming the below code is supposed to take care of this.

Testbench code



while(seq_item_port.has_do_available()) begin
 seq_item_port.get_next_item(req);
 req.status = UVM_TLM_INCOMPLETE_RESPONSE;
 seq_item_port.item_done();
 end
 break;


Follow up question, how do we restart the sequence in the test after the second time reset is high?

In reply to rag123:

Your problem is in the driver code. See here:

  @(posedge vif.rst_n);
     forever begin
       if (!vif.rst_n) begin      
         vif.pwdata <=0;
         vif.paddr <= 0;
         vif.pwrite <=0;
       //  vif.hsize <= 0;
       //  vif.htrans <= 0;
         vif.psel <=0;
         vif.pstrb <=0;
         `uvm_info ("driver","Entering here",UVM_NONE);
         if(tr != null) begin
 tr.status = UVM_TLM_INCOMPLETE_RESPONSE;
 seq_item_port.item_done();

I see 2 problems here:
(1) You are synchronizing on the rising edbe of rst_n (reset comes out of reset). And you are continuing by checking if vif.rst_n is low

if (!vif.rst_n) begin

This should not happen, because after the rising edge of rst_n the signal is high.
(2) In this reset branch you are doing a

seq_item_port.item_done();

without a

seq_item_port.get_next_item(..);

This is reported by your simulator.

In reply to chr_sue:

Thank you. I fixed the seq_item_port call and it fixed the issue. How about my follow up question? how do we restart the sequence in the test after it detected a reset in the middle of the test?

In reply to rag123:

I’d try to run the reset sequence and the operational sequence in a fork/join with different priorities.