Facing Issue with Parameter override from top_tb

Hello All,

I am having query related to the parameter override.

DUT:


module dut(
   parameter A = 30,
   `include parameter_file.sv
   parameter B = 20
   )(
   // DUT ports
   )
   // code
endmodule

parameter file: parameter_file.sv // In the parameter list I have given only 2 parameters for easy understanding. But really i am having so many parameters.


   parameter DATA_WIDTH = 32,
   parameter ADDRESS = 44,

I am taking include file from DUT: So same parameter include file I am using in the scoreboard.
Why I am taking same include(DUT) for scb: Because I using the same scb file across different IP’s. So that’s why I am taking values from DUT include file.

As compilation happening from basic uvm packages, seq/test pkgs, agents, env’s… at last my tb_top is compiling
Here in the TB top I am overriding the value of .DATA_WIDTH(64);


module tb();

   dut dut_inst(
      .DATA_WIDTH(64),
      // other parameters
   )(
   )
   //... code
endmodule

Issue: Now what is happening is my scb is getting default value from include file which is 32(DATA_WIDTH). Because tb_top compilation is happening after scoreboard. So scb is getting different parameter value(32) and DUT is getting different value(48) this leads to mismatches in scb. How to overcome this issue after overriding parameter from tb to DUT, I need update the same value to scoreboard

Please help me to resolve this.

In reply to Pavan Kumar Kollipara:

sharing constantly modifying parameters between the design and testbench is a common problem and there are many ways to tackle this.

The simplest approach is putting the parameters in a package, create different versions of the package with different values, and have the testbench and design reference that package. When you compile, select the version of the package you want.

There all also a number of strategies to make your testbench less dependent on compilation time parameters that have been written about in a number of places. See

https://verificationacademy.com/forums/uvm/how-control-parameter-value-test.#reply-91608

Hello Dave,

Thanks for quick reply,

I have used uvm_config_db set from TB after overriding the parameter and get in scb. This solved my problem.