Error loading the desing (Matlab - TB integration)

antonio92m · July 3, 2016, 7:51pm

Hello people,

I have to integrate Matlab as a golden model to my uvm testbench. For this I took the matlab example from here (and got it running the example). After that I integrated the matlab predictor into my TB.

Everything was fine until I tried to run the simulation. I get the following error:

** Note: (vsim-3812) Design is being optimized…

** Error: Failed to find design unit work.testbench.

Optimization failed

Error loading design

I believe it is because of my “.do” file but I do not know where to fix it. I did my “.do” file as an hybrid between the example Makefile for using Matlab and the “.do” file I was using previously.
My “.do” file is:
if [file exists “work”] {vdel -all} vlib work VHDL DUT vcom -mixedsvvh DUT/package_SEC/sec_common.vhd vcom +cover -f dut.f #Config files ./fileConfig.sh #Compiling QMW vlog qmw/qmw_sv/questa/qmw_hdl2matlab.sv vlog qmw/qmw_sv/questa/qmw_post_sim.sv echo “Simulating with MATLAB Scoreboard using qmw” vlog -f tb.f #in that file there is a description of what is needed to compile vopt top -o top_optimized +acc +cover=sbfec+scrambler(rtl). matlab -nosplash -r ‘run MATLAB/start.m’ & sleep 10 vsim +UVM_TESTNAME=random_test_matlab -voptargs=+acc -sv_lib qmw/qmw_sv/questa/qmw_client_64 testbench -do “qmw_demo.do” #Random_test set NoQuitOnFinish 1 onbreak {resume} log /* -r run -all coverage attribute -name TESTNAME -value random_test coverage save random_test.ucdb coverage report -code s -details -file code_coverage.txt vcover merge scrambler.ucdb random_test.ucdb vcover report scrambler.ucdb -cvg -details coverage report -code s -details -file coverage.txt quit


I know it is not easy to read, I tried the “code” tag but even though…
I would really appreciate if you could give me a hint of what can I be missing.
Thanks in advance,

Antonio

Srini · July 4, 2016, 3:14am

In reply to antonio92m:

Your top level TB module name might be different than “testbench” - either show top level module or full compile log (To see what vlog saw as module name).

Srini
www.verifworks.com

dirkh · July 4, 2016, 8:13am

In reply to antonio92m:
Hi,
two things caught my attention:
you run a vopt command as follows:
vopt top -o top_optimized +acc +cover=sbfec+scrambler(rtl).
According to this command the name of the optimized toplevel should be top_optimized, however during start of vsim you want to run a toplevel named testbench.
vsim +UVM_TESTNAME=random_test_matlab -voptargs=+acc -sv_lib qmw/qmw_sv/questa/qmw_client_64 testbench -do “qmw_demo.do”
According to the error message I assume that there is no entity/module named testbench within your database. Try to change the command to start vsim as follows:
vsim +UVM_TESTNAME=random_test_matlab -sv_lib qmw/qmw_sv/questa/qmw_client_64 top_optimized -do “qmw_demo.do”
As you already run a dedicated vopt step, there is no need anymore to apply vopt arguments to vsim, so I removed the -voptargs argument
My two cents
Dirk

antonio92m · July 4, 2016, 1:17pm

In reply to dirkh:

Hi Dirk and Srini,

First of all thanks for your answer :)

I have tried to modify the proposed vsim line but it did not work.

If I keep it like you mentioned Dirk it says I am trying to run a 64 bits file in a 32 bit machine. (I removed the -64 argument because I received an error. The line I tried to used, like in the qmw example, was:
"vsim -64 +UVM_TESTNAME=random_test_matlab -sv_lib qmw/qmw_sv/questa/qmw_client_64 top_optimized -do “qmw_demo.do” "
And the error I get is:

** Error: (vish-3296) Unknown option ‘-64’.

Use the -help option for complete vsim usage.

** Error: Error loading design

Error in macro ./run_matlab.do line 46

Error loading design

while executing

“error “Error loading design””

(procedure “vsim” line 140)

invoked from within

“vsim -64 +UVM_TESTNAME=random_test_matlab -sv_lib qmw/qmw_sv/questa/qmw_client_64 top_optimized -do “qmw_demo.do””

I thought of running the simulation as a 32 bit machine so I did:
vsim +UVM_TESTNAME=random_test_matlab -sv_lib qmw/qmw_sv/questa/qmw_client_32 top_optimized -do “qmw_demo.do”

With that I get the following error:

** Fatal: (SIGSEGV) Bad handle or reference.

Time: 0 ns Iteration: 23 Process: /uvm_pkg::uvm_phase::m_run_phases/#FORK#1847_f7d329a File: /home/antonio92/questasim/linux/…/verilog_src/uvm-1.1d/src/base/uvm_common_phases.svh

Fatal error in Function scrambler_pkg/base_test::end_of_elaboration_phase at tb_classes/base_test.svh line 27

I do not understand the last error as the base_test class is:


virtual class base_test extends uvm_test;
   env       env_h;
   uvm_sequencer #(sequence_item) sequencer_h;   

   extern function new (string name, uvm_component parent);
   extern function void build_phase(uvm_phase phase); 
   extern function void end_of_elaboration_phase(uvm_phase phase);
endclass

function base_test::new (string name, uvm_component parent);
   super.new(name,parent);
endfunction : new

function void base_test::build_phase(uvm_phase phase);
   virtual scrambler_bfm bfm;
   env_config env_config_h;
   
   if(!uvm_config_db #(virtual scrambler_bfm)::get(this, "","bfm", bfm))
     `uvm_fatal("TEST", "Failed to get the BFM");
   env_config_h = new(.bfm(bfm));
   
   uvm_config_db #(env_config)::set(this, "env_h*", "config", env_config_h);
   env_h = env::type_id::create("env_h",this);
endfunction : build_phase

function void base_test::end_of_elaboration_phase(uvm_phase phase);
   sequencer_h = env_h.scrambler_agent_h.sequencer_h; // I get the error right here...
endfunction : end_of_elaboration_phase

I guess the simulator cannot find exactly where the error is, because I do not understand where is the error there. In fact, I have been using the end_of_elaboration_phase like that before.

I also get the following warning, which I do not understand as my scrambler_dut it is compiled…

** Warning: (vopt-2008) Cannot find module or instance ‘scrambler’ specified in +cover option.

Thanks to both of you,
Antonio

antonio92m · July 4, 2016, 2:27pm

In reply to dirkh:

Hello Dirkh,

Well, yeah. I started running the matlab examples. Since then I am trying to integrate it to my testbench. I am using centos 6.7, so in theory what works for you should work for me.

The thing with the 32/64 bit thing. When I use the “-64” parameter from a “.do” file it does not work. However if I set it within a makefile(as in the example) it works.

Regarding the FTP server. I cannot access to it. I am not using any proxy (as far as I know althought I am in the university library). Would it work if I download an FTP client and send the file to that adress?
EDIT: I have tried to connect to the FTP server using the ftp command although It did not connect…

I am going to start from the beginning as well, lets see where the mistake is, although were I started the testbench was working. That is why I have the impression the problem is when integrating matlab.

Thanks Dirkh, I really appreciate your help.

Antonio

dirkh · July 5, 2016, 1:55pm

In reply to antonio92m:
Hi Antonio,
one more thing concerning the -64 option. Please be aware that the mode options -32 and -64 are supported only by a set of programs. The mode options must be specified directly on the command line. Mode options specified in command files are ignored. This may explain, why it does work while being used inside a makefile but not inside a do-file.
Next thing is concerning matlab: as far as I know, the latest matlab releases only support 64 bit mode, the final release for 32 bit mode was 2013x. So unless you use such old matlab release, it is my current understanding that the example cannot be run in 32 bit mode anymore as the matlab software does not provide 32 bit libraries.
Thanks
Dirk

antonio92m · July 5, 2016, 3:30pm

In reply to dirkh:

Hello Dirkh,

Thanks for your reply.

As you suggested I restarted from the beginning again. I went from the example which runs in my machine and adapted the testbench to work for my testbench.

I wrote the new makefile and tried to get it running, with no success. I honestly do not know what can be going wrong. My testbench works with my “.do” file.

When I run the makefile I get the following error (the same actually):

Fatal error in Function scrambler_pkg/base_test::end_of_elaboration_phase at tb_classes/base_test.svh line 28

That line corresponds to:


virtual class base_test extends uvm_test;
   env       env_h;
   uvm_sequencer #(sequence_item) sequencer_h;   

   extern function new (string name, uvm_component parent);
   extern function void build_phase(uvm_phase phase); 
   extern function void end_of_elaboration_phase(uvm_phase phase);
endclass

function base_test::new (string name, uvm_component parent);
   super.new(name,parent);
endfunction : new

function void base_test::build_phase(uvm_phase phase);
   virtual scrambler_bfm bfm;
   env_config env_config_h;
   
   if(!uvm_config_db #(virtual scrambler_bfm)::get(this, "","bfm", bfm))
     `uvm_fatal("TEST", "Failed to get the BFM");
   env_config_h = new(.bfm(bfm));
   
   uvm_config_db #(env_config)::set(this, "env_h*", "config", env_config_h);
   env_h = env::type_id::create("env_h",this);
   //sequencer_h = env_h.scrambler_agent_h.sequencer_h;
endfunction : build_phase

function void base_test::end_of_elaboration_phase(uvm_phase phase);
   sequencer_h = env_h.scrambler_agent_h.sequencer_h; // This is the line which is wrong
endfunction : end_of_elaboration_phase

That line fails running the makefile but it does not fails with my testbenches.

I thought of moving the


   sequencer_h = env_h.scrambler_agent_h.sequencer_h; // This is the line which is wrong

from the end_of_elaboration_phase to the build_phase, but then all the testbench crashes. I get the following error:

** Fatal: (SIGSEGV) Bad handle or reference.

Time: 0 ns Iteration: 7 Process: /uvm_pkg::uvm_phase::m_run_phases/#FORK#1847_f7d2ddb File: tb_classes/base_test.svh

Fatal error in Function scrambler_pkg/base_test::build_phase at tb_classes/base_test.svh line 24

I do not understand why it works for my testbench but it does not work with the QMW example.

Thank you,
Antonio

antonio92m · July 5, 2016, 4:56pm

In reply to antonio92m:

I have found one of the mistakes.
I had a test that inherited my base test. This test created a new build phase but never called the super. method and therefore the whole hierarchy was destroyed. It seems I am progressing, lets see how it concludes!!

antonio92m · July 5, 2016, 8:51pm

In reply to antonio92m:

Regarding to the Makefile, could anyone tell me which is the way of optimising the design?
In my “.do” file I was doing this:
vopt top -o top_optimized +acc +cover=sbfec+scrambler(rtl).
However this does not work within my makefile, I get the following error:

/bin/sh: -c: line 0: syntax error near unexpected token `(’

/bin/sh: -c: line 0: `vopt top -o top_optimized +acc +cover=sbfec+scrambler(rtl).’

make: *** [compile_sv_tb] Error 1

Thanks in advance,
Antonio

chr_sue · July 6, 2016, 6:49am

In reply to antonio92m:
Hello Antonio,

Questa starts automatically in the opt-mode if you do not instruct differently with -novopt.
You do not need to run the opt-step seperately.
In former versions it was differently. Questa was starting in novopt-mode.

antonio92m · July 6, 2016, 1:55pm

In reply to chr_sue:

Thank you Chris. It is good to know that!

antonio92m · July 7, 2016, 5:19pm

In reply to antonio92m:

Regarding to the UVM-Matlab integration, it works. The predictor is working eventually succesfully!!!

However there is a number of transactions where my testbench dies. I get the following error:

** Fatal: qmw_hdl2matlab fatal: Invalid variable name X

Time: 755390 ns Scope: qmw_hdl2matlab.getIntMultiDim File: qmw/qmw_sv/questa/qmw_hdl2matlab.sv Line: 136

Break at qmw/qmw_sv/questa/qmw_hdl2matlab.sv line 136

The way I communicate with Matlab I would say it is pretty similar to the example provided.


class predictor_matlab extends predictor; //input data
   // Declaration macros
   `uvm_component_utils(predictor_matlab);

   extern function new(string name, uvm_component parent);
   extern function void build_phase(uvm_phase phase);
   extern function void write(sequence_item t);
endclass: predictor_matlab

function predictor_matlab::new(string name, uvm_component parent);
   super.new(name,parent);
endfunction: new

function void predictor_matlab::build_phase(uvm_phase phase);
   data_out_ap = new("data_out_export",this);
   void'(qmw_hdl2matlab::qmw_sendCmd("clear scr_nuevo")); //I do this to clear persistent matlab variables
endfunction : build_phase

function void predictor_matlab::write(T t);
   sequence_item predicted;
   
   string msg, cmd, cmd_rsp;

   predicted = sequence_item::type_id::create("predicted");
   //t is the input sequence(Transaction)
   predicted.do_copy(t);
   
   $sformat(msg, "%s",t.convert2string());
   `uvm_info(get_name(),msg, UVM_HIGH);

 $sformat(cmd,"X = scr_nuevo(%d,%d)",t.d_in,t.d_out);
   `uvm_info(get_name(), cmd, UVM_HIGH);
   // Call our MATLAB function with our transaction inputs
   void'(qmw_hdl2matlab::qmw_sendCmd(cmd));
   
   // Read the result from Matlab   
   qmw_hdl2matlab::getIntValue("X",predicted.d_out);

   data_out_ap.write(predicted);
endfunction: write

However I would like to know why the testbench breaks with that $fatal error under certain number of transactions.

Thank you,
Antonio

chr_sue · July 7, 2016, 6:49pm

In reply to antonio92m:

Hello Antonio,
I presume X is a variable. Right?
And qmw_hdl2matlab::getIntValue(“X”,predicted.d_out); assigns a value from the predictor to the vatriable x. Is this correct?
If this is really the case then it seems there is no value provided by the predictor.
This is what I’d check.

Christoph

antonio92m · July 8, 2016, 2:23pm

In reply to chr_sue:

Hello Chris,

Well, X is the variable that holds the value returned by the Matlab function If this is really the case then it seems there is no value provided by the predictor…
And yeah that call assigns the value from X to that variable within my transaction.

Yes, I agree it seems to be that, however it runs for many transactions and then breaks with a higher number of them. And actually what the function does is very simple, just and XOR.
I could think my function makes matlab to crash but actually I have tried a script in matlab with a for loop of this function and it does not crash.

Thanks,
Antonio

chr_sue · July 8, 2016, 5:56pm

In reply to antonio92m:

Hello Antonio,

the question is how many sequence items do you generate.

Christoph

antonio92m · July 9, 2016, 9:39am

In reply to chr_sue:

Hello Christoph,

Well, before I had the valid input of my DUT as a random variable, which made the number of sequence_items a bit random.
I have changed that and the valid input of my DUT it is controlled. I did not like it random.
At the moment I am generating about 5000 sequence_items.
When I run a normal test, with no Matlab predictor, it works fine. But somehow the integration with Matlab breaks after certain number of transactions. I do not know if this has to be something with the requirements of my laptop as it has an i7 and 8GB of RAM.

Also I wanted to mentioned that if I run the same function I am calling within my UVM predictor connected to Matlab from Matlab directly it never crashes.

Thank you,
Antonio

antonio92m · July 11, 2016, 2:27pm

In reply to antonio92m:

Hello,

The last thing I have tried. I though maybe there has something to do with my matlab script, so I run a simulation where I sent “X=1;” to matlab and then retrieved that value. Which I think it should not be complicated in the communication.
That works as my script, when the number of transaction grows the simulation breaks:

** Fatal: qmw_hdl2matlab fatal: Invalid variable name X

Time: 114690 ns Scope: qmw_hdl2matlab.getIntMultiDim File: qmw/qmw_sv/questa/qmw_hdl2matlab.sv Line: 141

Break at qmw/qmw_sv/questa/qmw_hdl2matlab.sv line 141

Simulation Breakpoint: Break at qmw/qmw_sv/questa/qmw_hdl2matlab.sv line 141

And the only thing I’ve done is:


   $sformat(cmd, "X = 1;");
   `uvm_info(get_name(), cmd, UVM_HIGH);
   // Call our MATLAB function with our transaction inputs
   void'(qmw_hdl2matlab::qmw_sendCmd(cmd));
   
   // Read the result from Matlab   
   qmw_hdl2matlab::getIntValue("X",predicted.d_out);

I am about to try to use the DPI instead of the QMW to see if it has something to do with the QMW.

Antonio

chr_sue · July 11, 2016, 2:38pm

In reply to antonio92m:

Hello Antonio,
I do not know any limitation of sequence items to be processed by UVM or the simulator.
I’d guess it is caused by any out-of-range for a variable or by the QMW. Switching to the DPI seems to be a good idea, because you become independent of any piece of adaption code.
I never tried the QMW in a industrial project.

Christoph

antonio92m · July 11, 2016, 5:36pm

In reply to chr_sue:

Hello Christoph,

Actually that limitation for me only happens when using Matlab as a predictor. If I use my SV predictor nothing happens and everything runs fine.

I have tried to use the example to incorporate the DPI into my project but it does not work for me.
If the original Makefile is:

####################################################################################

Makefile for MATLAB integration example

Note: QUESTA_SIM needs to be set to the Questa Installation Path

MATLAB needs to be set to MATLAB Installation Path

This is configured for 64bit mode. Change as needed for 32bit mode

VLOG_ARGS :=
VSIM_ARGS = -voptargs=+acc

all: simulate_sv simulate_matlab_dut simulate_matlab_sb simulate_matlab_sb_qmw

clean:
rm -rf work/ transcript *.wlf *.so *.o *.log

compile_sv_tb: create_work
vlog +incdir+sv/txn_pkg sv/txn_pkg/txn_pkg.svh
vlog +incdir+sv/agent_pkg sv/agent_pkg/simple_agent_pkg.svh
vlog +incdir+sv/sequence_pkg sv/sequence_pkg/sequence_pkg.svh
vlog ${VLOG_ARGS} +incdir+sv/environment sv/environment/env_pkg.svh
vlog +incdir+sv/test_pkg sv/test_pkg/test_pkg.svh

compile_dpi:
# Generate DPI header file and compile/link DPI code
vlog MATLAB/matlab_dpi_pkg.sv
gcc -O4 -c -fPIC -Wall -I$(MATLAB)/extern/include -I./MATLAB -I$(QUESTA_HOME)/include -o matlab_dpi.o ./MATLAB/matlab_dpi.c
gcc -shared -Wl,-Bsymbolic -Wl,-export-dynamic -L$(MATLAB)/bin/glnxa64 -leng -lmx -o matlab_dpi.so matlab_dpi.o

create_work:
vlib work

optimize:

simulate_sv: clean compile_sv_tb
@echo “Simulating SV only environment”
vlog sv/testbench.sv
vsim +UVM_TESTNAME=test $(VSIM_ARGS) -suppress 3770 testbench

simulate_matlab_sb: clean compile_sv_tb compile_dpi
@echo “Simulating with MATLAB Scoreboard”
vlog sv/testbench.sv
vsim -64 +UVM_TESTNAME=test_matlab_scoreboard $(VSIM_ARGS) -sv_lib matlab_dpi testbench

compile_qmw:
vlog qmw/qmw_sv/questa/qmw_hdl2matlab.sv
vlog qmw/qmw_sv/questa/qmw_post_sim.sv
$(eval VLOG_ARGS := +define+QMW)

simulate_matlab_sb_qmw: clean compile_qmw compile_sv_tb
@echo “Simulating with MATLAB Scoreboard using qmw”
vlog sv/testbench.sv
matlab -nosplash -r ‘run MATLAB/start.m’ &
sleep 10
vsim -64 +UVM_TESTNAME=test_matlab_scoreboard $(VSIM_ARGS) -sv_lib qmw/qmw_sv/questa/qmw_client_64 testbench -do “qmw_demo.do”

post_sim_sb_qmw:
matlab -nosplash -r ‘run MATLAB/start.m’ &
sleep 10
vsim -voptargs=“+acc” qmw_post_sim -sv_lib qmw/qmw_sv/questa/qmw_client_64 -do “qmw_post_sim.do”

simulate_matlab_dut: clean compile_sv_tb
@echo “Simulating with MATLAB DUT”
vlog +define+MATLAB sv/testbench.sv
matlab -nosplash -desktop -logfile matlab.log -r modelsim_matlab &
# Allow MATLAB to start
sleep 10
vsim -64 +UVM_TESTNAME=test (VSIM_ARGS) -suppress 3770 testbench \ -foreign "matlabclient (MATLAB)/toolbox/edalink/extensions/modelsim/linux64/liblfmhdlc_tmwgcc.so"
-do scripts/matlab.do

.PHONY: all clean

####################################################################################

When I write:
make simulate_matlab_sb, I get the following error:
** Error: sv/environment/env_pkg.svh(36): Could not find the package (matlab_dpi_pkg). Design read will continue, but expect a cascade of errors after this failure. Furthermore if you experience a vopt-7 error immediately before this error then please check the package names or the library search paths on the command line.
make: *** [compile_sv_tb] Error 2

And this has to be because this DPI is imported in the env_pkg, but it is not correctly compiled beforehand.

In the dependencies of the Makefile says:
simulate_matlab_sb: clean compile_sv_tb compile_dpi, therefore the DPI is compile after the SV testbench. If I swap the order (also creating the work directory first (create work):
simulate_matlab_sb: clean create_work compile_dpi compile_sv_tb

I get another error:
gcc -O4 -c -fPIC -Wall -I/extern/include -I./MATLAB -I/include -o matlab_dpi.o ./MATLAB/matlab_dpi.c
./MATLAB/matlab_dpi.c:9:20: error: engine.h: No such file or directory
./MATLAB/matlab_dpi.c:12: error: expected ‘=’, ‘,’, ‘;’, ‘asm’ or ‘attribute’ before ‘’ token
./MATLAB/matlab_dpi.c:13: error: expected ‘=’, ‘,’, ‘;’, ‘asm’ or ‘attribute’ before ‘’ token
./MATLAB/matlab_dpi.c: In function ‘start_matlab’:
./MATLAB/matlab_dpi.c:18: error: ‘ep’ undeclared (first use in this function)
./MATLAB/matlab_dpi.c:18: error: (Each undeclared identifier is reported only once
./MATLAB/matlab_dpi.c:18: error: for each function it appears in.)
./MATLAB/matlab_dpi.c:18: warning: implicit declaration of function ‘engOpen’
./MATLAB/matlab_dpi.c:22: warning: implicit declaration of function ‘engOutputBuffer’
./MATLAB/matlab_dpi.c: In function ‘send_matlab_cmd’:
./MATLAB/matlab_dpi.c:28: warning: implicit declaration of function ‘engEvalString’
./MATLAB/matlab_dpi.c:28: error: ‘ep’ undeclared (first use in this function)
./MATLAB/matlab_dpi.c: In function ‘stop_matlab’:
./MATLAB/matlab_dpi.c:38: warning: implicit declaration of function ‘engClose’
./MATLAB/matlab_dpi.c:38: error: ‘ep’ undeclared (first use in this function)
make: *** [compile_dpi] Error 1

I do not know if it is just me who has the problems with the makefile in the matlab_uvm_example or the files are just wrong. I got the files from:
https://verificationacademy.com/cookbook/matlab/integration

Thank you,
Antonio

chr_sue · July 11, 2016, 6:11pm

In reply to antonio92m:

Hello Antonio,

there is something wrong with the timestamps or the make mechanism.
I was running the single steps from the Makefile as follows:
vlog ./MATLAB/matlab_dpi_pkg.sv
make compile_sv_tb
vlog sv/testbench.sv
vsim +UVM_TESTNAME=test -voptargs=+acc -suppress 3770 testbench

This works for me with the original code from the Verification Academy.

Good luck!
Christoph