Hello sir,
I am new in UVM. My question is based upon the RAL Adapter class.
sir as per my knowledge, in uvm environment, uvm_driver is used to sending the request to sequence to generate the transactions and send to driver by different methods where driver task is to convert this transaction level signal to pin level and send it to the DUT by send_to_dut task written in uvm_driver class ok…
But my question is sometime i saw a code where in the driver class thay just declare constructor class and build_phase enough (only skeleton) but they do not drive the signals to DUT by the driver class. They drive the signal through RAL adapter.
So, sir can you explain how the RAL method comes into the picture for driving and collecting purpose???
Thanks
KAPIL
Kapil,
Your doubt is not clear, it would be better if you post example code. I recommended you learn about RAL first, just to give an overview you need to connect your bus sequencer and adapter to the top regblock in your env. your test sequences/env generates register read/write request using RAL and RAL uses reg adapter to convert the transactions into bus transactions format. Then RAL uses sequencer assigned during initialization to drive these transactions on to the bus. Basically adapter is only responsible for converting register transactions to env defined bus transactions.
For more info refer to UVM cookbook.
Rohit
In reply to kapil khare:
The driver is a so called transactor, i.e. it is connected on the one side to a transaction-level block (sequencer). On the other side it is connected trough a virtual interface to the DUT. This is the case if you have a DUT on the pin-level. If you have a high-level DUT (transaction-level) then you do not need a driver, but only in this case.
The RAl adapter is used to convert the RAL transactions into bus transactions. It accomplishes the data stream from the bus sequencer, but it never works alone.