I have an internal net called wire P_HOOK under a design. My requirement is to drive this signal in UVM sequence
How do i do that
so far i did
interface test1 (input clk);
bind design_top: `DUT.design_top_test1 test1_0 (
When i try to access this in my uvm sequence
class test_sequence extends uvm_sequence ...
virtual test1 vif;
task drive ();
vif.p_hook = 1'b1;
I get the following error : Usage of 'vif.p_hook' inconsistent with 'net' object.
Can anyone tell what i am doing wrong