Declaration of macro uvm_*_imp_decl

UVM
,
1

Hi ,

Is it a norm to declare `uvm_*_imp_decl outside a class which would be using it ?


`uvm_put_imp_decl(_1)
`uvm_put_imp_decl(_2)

class my_put_imp#(type T=int) extends uvm_component;
   uvm_put_imp_1#(T) put_imp1;
   uvm_put_imp_2#(T) put_imp2;
   ...
   function void put_1 (input T t);
     //puts comming into put_imp1
     ...
   endfunction
   function void put_2(input T t);
     //puts comming into put_imp2
     ...
   endfunction
endclass

Since class my_put_imp has these members why not declare the macro internal to the class . That way we can even avoid global namespace issues .

Thanks

2

In reply to MICRO_91:

Yes, you can nest class declarations; not everyone is aware of that. If you are putting your classes in packages, there is not as much concern over global namespace collisions.

3

In reply to dave_59:

Hi Dave ,

Could you please elaborate on the package statement .

Suppose I have 2 packages ( pack1 and pack2 ) both of which are imported in top_tb .

So if someone unwillingly declares ( Outside the class ) ::


`uvm_put_imp_decl(_1)
`uvm_put_imp_decl(_2)

in both packages ( through sv file OR directly in packages itself ) shouldn’t that be an error ?

Also I have a question regarding application of `uvm_put_imp_decl .

I understand usage of `uvm_analysis_imp_decl since these would be connected to analysis_ports which have unbounded connections . So single analysis port can be connected to multiple analysis_imps belonging to same component .

But when would `uvm_put_imp_decl macro be useful ? ( I understand that we can’t have same method name declared twice ) .

Since ports have min_size and max_size as 1 ( default ) .