I want to verify I2C slave core and for that as we know that in I2C start condition is created when SCL line is HIGH but SDA goes from HIGH to LOW. Also clock can only be generated by only Master and SCL should be generated by Master Driver. Now inside Driver I am stuck in two things:
1-How can I calculate SCL pulse width according to standard frequency mode.i.e 10-100KHz?.e.g SCL High period and SCL Low Period?
2-While writing Master driver for I2C Slave Core how can i create a START condition?
I will be really grateful to you for this. Any help will be much appreciated. Anxiously waiting for reply. please help me..