Connecting vip to interface in uvm

I have a uvm vip in vmm env.
vmm env is communication with the uvm vip .
But I am not abled to connect my uvm vip virtual interface with dut physical interface .
can any a=one help me out for same ?

with example.

Well, the UVM part of your testbench will still be accessible via the config_db. Please see this Cookbook article for more details.

function void build_phase(uvm_phase phase);
super.build_phase(phase);
uvm_config_db#(virtual apb_master_if)::set(this, “apb_master_agent”, “mst_if”, top_tb.u0_T_wrapper.u0_apb_master_if);

Actually I instantiate my uvm agent in a dummy uvm compont which is instatiated in vmm env.

this dummy comp. has tlm port to communicate with vmm world. hat’s happening, but uvm agent virtual inter face is not connected to dut.

I am configuring virtual interface in the dummy component like above method , but no dut drive happening.

I’ll need to see your UVM hierarchy and where you do the config_db::get as well. If you’re doing the get in the agent, you still have to pass the virtual interface down into the driver and monitor. Might work if you did “apb_master_agent.*” in your set call.

uvm_config_db#(virtual apb_master_if)::set(this,“mst_drv”,“drv_if”,mst_if);
uvm_config_db#(virtual apb_master_if)::set(this,“mst_mon”,“mon_if”,mst_if);

I am doing set in agent and passing to driver and monitor.
Above agent I have one more heirechy of dummy uvm comp. whr I am config. virtual interface like below:
uvm_config_db#(virtual apb_master_if)::set(this, “apb_master_agent”, “mst_if”, top_tb.u0_T_wrapper.u0_apb_master_if);

Please show me the uvm_config_db::get() calls in the master agent, driver and monitor. I’m assuming that top_tb.u0_T_wrapper.u0_apb_master_if is the hierarchical path in your RTL from the top-level module.
If your get/set calls look like this:


class apb_master_agent extends uvm_component;
...
  master_driver mst_drv;
  master_monitor mst_mon;
...
  uvm_config_db#(virtual apb_master_if)::get(this,"","mst_if",mst_if);
  uvm_config_db#(virtual apb_master_if)::set(this,"mst_drv","drv_if",mst_if);
  uvm_config_db#(virtual apb_master_if)::set(this,"mst_mon","mon_if",mst_if);
...
endclass

class master_driver extends uvm_driver;
...
  uvm_config_db#(virtual apb_master_if)::get(this,"","mst_if",mst_if);
...
endclass

class master_monitor extends uvm_component;
...
  uvm_config_db#(virtual apb_master_if)::get(this,"","mst_if",mst_if);
...
endclass

then you should be in reasonably good shape.

In reply to tfitz:

Yes , I am doing get and set in agent and drv and mon.
As agent is instantatiated in another dummy comp., Is it somthing required there apart from this
uvm_config_db#(virtual apb_master_if)::set(this, “apb_master_agent”, “mst_if”, top_tb.u0_T_wrapper.u0_apb_master_if);

Again how this dummy component interface will be pointed by vmm env. virtual interface for same.?

In reply to skumarsamal:

When using the uvm_config_db, remember that the UVM paths of the set and get must match. In UVM, even if you’re inside a VMM hierarchy, the paths start at ‘uvm_test_top’ and go down from there. So, if your agent is inside a dummy component, its path will be ‘uvm_test_top.dummy.apb_master_agent’. If your

 
uvm_config_db#(virtual apb_master_if)::set(this, "apb_master_agent", "mst_if", top_tb.u0_T_wrapper.u0_apb_master_if);

call is done from this dummy component, then the path you are using on the set() call is {this.get_full_name(),“apb_master_agent”}. If your set() call is not done from the agent’s immediate parent, the paths won’t match. Try turning on +UVM_CONFIG_DB_TRACE

In reply to tfitz:

Thanks , set and get method working and abled to do interface connection .
Now I facing another issue with UVM side.
My sequces are generated in run time i.e. run_phase .
I wan to send one by one sequences to UVM VIP.
For that I have tried like below:

task run_phase(uvm_phase phase);
forever begine
get(tr) //Assume that by this method I am getting new tr. in runphase from Vmm world
data_put(tr);
end
endtask

task data_put (uvm_apb_rw tr);

//Puting data to sequencer 

apb_seq= apb_sequence::type_id::create("apb_sequence");
apb_seq.item.addr= tr.addr;
$display("Agent Wrapper rdata:%0d\n",apb_seq.item.addr);
if(tr.cmd == uvm_apb_rw::WR)begin
    apb_seq.item.data = tr.data;
    apb_seq.item.trans_type  = apb_txn::WRITE;
$display("Agent Wrapper data:%0d,type:%0d\n",apb_seq.item.data,apb_seq.item.trans_type);
end
else begin
    apb_seq.item.trans_type = apb_txn::READ;
end
apb_seq.item.addr= tr.addr;
apb_seq.item.slave_sel= 0;
$display("Agent Wrapper addr:%0d,type:%0d\n",apb_seq.item.addr,apb_seq.item.trans_type);

apb_seq.start(apb_master_agent.mst_sqr);

endtask

class apb_sequence extends uvm_sequence #(apb_txn);
apb_txn item;
rand integer unsigned rdData;
function new(string name=“apb_sequence”);
super.new(name);
//item = new(“Master Txn”);
item = apb_txn::type_id::create(“item”,get_full_name());
endfunction

`uvm_object_utils(apb_sequence);

virtual task body();
$display(“Entering into the start task call Addr:%0d\n”,item.addr);
start_item(item);
finish_item(item);
item.end_event.wait_on();
rdData = item.data;
$display(“Exiting from the start task call Data:%0d\n”,item.data);
endtask:body
endclass:apb_sequence

But after 2 tr. is completed It’s not returing back to take 3rd tr. from put_data() task .
It’s completing 2nd tr . from task body() it’s returning back to driver run_phase to continue and hanged.

Can anyone pls help me out how to create runtime sequence and sending it to driver runtime one after another .?
pls provide ex. for understanding.