Connecting uvm_analysis_ports without an interface

Hi folks,

I have a BFM which has TLM FIFO’s and uvm_anaylsis_ports and receive and transmit data through these. I need to connect this to another component (a physical layer) but instead of connecting it to another BFM, I need to connect it to the real RTL model. I am trying to find a way to avoid creating an interface for my BFM because it will become obsolete once I have the physical layer BFM with uvm_analysis_ports.

For now, I need to connect my BFM to the actual RTL and test it out. Is it possible to do this without creating an interface? Can I connect my uvm_analysis_ports directly to the RTL ports in the top level ? Something like,

class bfm_top;

function void connect_phase(uvm_phase phase);

BFM.port_1.connect(RTL.port_a);

endfunction

endclass

In reply to Prathyusha Sandilya:

Sounds a little bit confusing to me. I try to ask back:
(1) When you say ‘interface’ you mean a pinlevel interface. Right?
(2) Your RTL is clock-based I guess?
(3) The real RTL model does not have TLM connections, because this is a different modelling style you can’t mix.