Confusion in Run and Reset phase

UVM
,
1

Hi,

I am trying to apply reset from my driver, but I see that the run and reset phase are getting executed in parallel.
How to make use of reset phase ? and what is the difference between run and main phase ?


class simpleadder_driver extends uvm_driver #(simpleadder_transaction);
  `uvm_component_utils(simpleadder_driver)
  virtual simpleadder_if vif;
  
 ...
...
...
  
  task run_phase(uvm_phase phase);
   begin
    simpleadder_transaction sa_tx;
    
    forever 
      begin
		seq_item_port.get_next_item(sa_tx);
		@(negedge vif.sig_clock);
		vif.sig_ina = #0 sa_tx.ina;
		vif.sig_inb = #0 sa_tx.inb;
		vif.sig_en_i = #0 1'b1;
		vif.operation = #0 sa_tx.operation_sel; 
		`uvm_info("DRIVER", "run phase execution", UVM_MEDIUM)
		seq_item_port.item_done();

      end	
    end
   endtask

   task reset_phase(uvm_phase phase);
   
  	phase.raise_objection(this);
	  vif.sig_rst = 1'b1;
  #5;
  vif.sig_rst = 1'b0;
    vif.sig_ina = 16'b0;
    vif.sig_inb = 16'b0;
  vif.operation = 2'bxx;
  `uvm_info("DRIVER", "Reset phase execution", UVM_MEDIUM)
  #20 vif.sig_rst = 1'b1;
  phase.drop_objection(this);
  
endtask: reset_phase 

endclass : simpleadder_driver
2

In reply to Swasti101:

Hi,

  1. It is not required to put #0 always.
  2. Use NBA assignment in the driver.
3

In reply to sunils:

Thanks, but that does not clear my doubt about how to use reset phase and wait for reset phase completion before the run phase begins.

4

In reply to Swasti101:

Hi,

The code for reset phase is correct. When run_phase is called it executes the reset, configure, main and shutdown in sequential order, and pre and post are there for each of them, for support if any. Why you want to wait for the reset phase?

5

In reply to sunils:

In reset phase I want to initialize all inputs to zeros.
I want to wait for reset phase to complete so that I can then apply my random inputs to DUT.

6

In reply to Swasti101:

You are already initializing all inputs to zero. You mean to say that reset_phase is not coming out of reset_phase. Is your reset_phase is not completing?

7

In reply to sunils:

Sunils,

my reset_phase is completing, but it executes in parallel with the run phase. But I don’t want that.
I want to understand the functionality of each phase - reset, configure, main, shutdown and how to implement them.
That’s why I have written the reset phase and applied my reset there.

8

In reply to Swasti101:

The reset_phase is a sub-phase of the run_phase that executes in parallel. The main_phase is also a sub-phase of the run_phase that executes in parallel. However all of the sub-phases execute in serial order. You would not use the run_phase together with the sub-phrases

It would be much simpler to have a reset_sequence rather than deal with the UVM phases.

9

In reply to Swasti101:

There are two questions in your thread.

The answer of first one is given by Mr. Dave.
Lastly, as per protocol for example, if you need to configure, then implement the code. Similarly for main shutdown etc.

10

In reply to sunils:

Thanks Sunils.