Hi ,
I was going through UVM Cookbook :: Register Blocks
function uvm_reg_map create_map(string name, // Name of the map handle
uvm_reg_addr_t base_addr,// base address
int unsigned n_bytes, // access width in bytes
uvm_endianness_e endian, // endianess of the map
bit byte_addressing=1);
" The byte_addressing argument affects how the address is incremented in these consecutive accesses. For example, if
n_bytes=4 and byte_addressing=0, then an access to a register that is 64-bits wide and at offset 0 will result in two
bus accesses at addresses 0 and 1. With byte_addressing=1, that same access will result in two bus accesses at
addresses 0 and 4. "
My confusion is
(1) If n_bytes = 4 and byte_addressing is 0 , then to access register of 64-bits shouldn’t the bus access occur at address 0 and 4 ?
(2) If n_bytes = 4 and byte_addressing is 1 , then shouldn’t access to register of 64 bits occur at addresses 0 and 1 ?