Moderators,
We are planning to develop our UVCs using UVMA (UVM Accelerated) methodology.
We may need to build our confident that UVMA approach is faster and same environment can used in RTL simulation and Emulation box.
I may need a example UVCs with AHB/AXI/APB bus and interrupt at dut interface on both UVM and UVMA.
Appreciate your help.
John
In reply to John Verif:
I found an example at Emulation | Verification Academy
But, I could not able to use it because it has exclusive uvm_register package. Getting errors as below.
**return factory.create_object_by_name(requested_type_name,
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ncvlog: *E,ILLHIN (…/…/…/…/uvm_register-2.0/src/uvm_named_object.sv,1005|37): illegal location for a hierarchical name (in a package).
ncvlog: *E,ILLHIN (…/…/…/…/uvm_register-2.0/src/uvm_named_object.sv,1017|35): illegal location for a hierarchical name (in a package).
factory.set_inst_override_by_name(
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ncvlog: *E,ILLHIN (…/…/…/…/uvm_register-2.0/src/uvm_named_object.sv,1050|34): illegal location for a hierarchical name (in a package).
factory.debug_create_by_name(
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ncvlog: *E,ILLHIN (…/…/…/…/uvm_register-2.0/src/uvm_named_object.sv,994|29): illegal location for a hierarchical name (in a package).
factory.set_type_override_by_type(get(),override_type,replace);
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ncvlog: *E,ILLHIN (…/…/…/…/uvm_register-2.0/src/uvm_named_object_registry.svh,145|36): illegal location for a hierarchical name (in a package).
factory.set_inst_override_by_type(get(),override_type,inst_path);
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ncvlog: *E,ILLHIN (…/…/…/…/uvm_register-2.0/src/uvm_named_object_registry.svh,174|36): illegal location for a hierarchical name (in a package).
**
I’m using Incisiv with uvm1.2 version.
Since uvm_reg is inclusive now, why we need exclusive uvm register package?
Anyone, guide me how can I fix these?
John
In reply to John Verif:
Hello John,
Regarding your first question, on building confidence that (our approach at Mentor for) UVM & co-emulation provides speed-up and is unified/interoperable/portable between simulation and emulation, may I suggest that you and I get in touch “off-line” so that I can better help you getting that confidence through some “custom” guidance. My e-mail is hans_vanderschoot@mentor.com
Meanwhile, you did find the right section in the UVM cookbook with a description of the methodology for UVM & emulation along with working down-loadable examples. Note that these examples are not necessarily going to provide huge speed-ups because they are small educational examples with “even smaller” DUTs that pose no problems whatsoever in simulation. The examples serve to illustrate the testbench architectural requirements for co-emulation and the migration path from an existing conventional single top pure simulation testbench to the dual domain co-emulation testbench archirtecture and implementation. Realize that if you were to follow these architectural requirements from the start of a new testbench development there is no migration needed. That is precisely the idea, i.e. that you start developing your testbenches from the start with co-emulation in mind.
Having said this, the given examples will yet run faster with Questa+Veloce than with Questa alone, just not by typically desired speed-up factors, again, because of the size of the examples.
For your second question/comment, the example that you are trying to run uses an external register package indeed. This is because the example was derived from a simulation example that itself was created some time ago when such package was not quite part of the UVM class library yet, and suffice it to say that the example has not been updated since then. And nor does it need to for the purpose of illustrating UVM and co-emulation at work. Nothing from the register package code changes to make it work with emulation (at least not for front-door accesses). Nevertheless, I have made a note to look at upgrading the example to use the built-in register code but it may take a while before I get to that.
In the meantime, you should be able to run the example as-is “out of the box”, since the external reghister package it uses is included in the tarball you download. That is, the example is self-contained. And the Makefile under tb_build_tbx_uvm/block_level_tbs/spi_tb has local variables to find the required source code at the right places. In particular: UVM_REGISTER ?= …/…/…/…/uvm_register-2.0).
I tried myself by downloading the tarball. I was able to run using Questa and Questa/Veloce withouit problems. So the errors you run into appear to be Incisive related. Do you have access to Questa? Otherwise, maybe your Incisive support can help you get this fixed quickly. As said before, I will aim to upgrade the example to use the built-in registers.
Lastly, there are a few earlier examples in the cookbook section, smaller but examples nevertheless. These illistrate what a UVM driver might look like. Try running these as there is no register package involved.
Thanks and regards,
Hans
In reply to hansv:
Thanks Hans.
I managed to run UVMA examples in Incisiv.
Sure, I’ll email you if any questions.
John