Clock generation using clock polarity

UVM
1

Hi,

I have a CPOL variable inside the test, if I assign CPOL value as 1, the clock should be inverted else I pass 0 to the CPOL, the clock should start at posedge.
How should I do it?

Thanks in advance.

2

In reply to A E Aravind:

You can invert any signal by passing through an xor expression

assign clock = ref_clock ^ CPOL;

I am guessing there is more to this question.