Hi. I have been trying to understand the use of virtual sequences and virtual sequencers in testbench environment. The UVM cookbook says that virtual sequencer is not recommended and is termed as “legacy”. It is said that in the case of virtual sequencers, there is a limitation that it is fixed implementation which is tightly coupled to the local hierarchy of an env and adds complications to vertical reuse. Can someone provide an example to demonstrate how virtual sequencers have this limitation and how virtual sequence overcomes this?
I’m sorry but I could not understand why exactly virtual sequencer not recommended and how does virtual sequence help in vertical reusability while virtual sequencer fails to do so. Can you provide a simple example code to get a clearer understanding?
An alternative methodology for running virtual sequences is to use a virtual sequencer, which is a uvm_sequencer which contains the handles for the target sequencers. In this methodology, the virtual sequence is started on the virtual sequencer and it gets the handles for the target sequencers from the virtual sequencer. The limitation of this approach is that it is a fixed implementation which is very tightly coupled to the local hierarchy of an env and this adds complications with vertical reuse.
Essentially, both methods require about the same amount of code, but the virtual sequenceR method requires much more foreknowledge about the hierarchical structure of the environment. Just using the virtual sequence is more reusable.