Can we have a TLM ports instead of complete agent?

HI,
I need to configure the modes driving through DUT, i dont want complete dont want to monitor too, just need to drive the modes configuration. Can we have any specific mechanism in UVM or any TLM ports available ?

Thanks
SANJAIKUMAR

In reply to sanjai_483:

You do not say where the configuration data are coming from. Of course there are different ways to do this. You could simply use a sequencer/driver combination.

In reply to sanjai_483:

Yes, as pointed out in the above reply, you are looking for a passive agent. One way to do so is to use the config objects via uvm_config_db.

In reply to chr_sue:

Hi,
Yes we can use simple sequencer/driver, but i dont want to monitor.
From the test, i need to change the mode of the DUT. So can I use uvm_blocking_get_port methodolgy, if i use how to configure from the test.

Thanks in advance

In reply to chiranjeev:

Hi,
No. I am not looking for monitor. I want to configure DUT to change mode through separate component, I dont want to implement a full agent. Instead Can i use TLM ports ?

In reply to sanjai_483:

In reply to chr_sue:
Hi,
Yes we can use simple sequencer/driver, but i dont want to monitor.
From the test, i need to change the mode of the DUT. So can I use uvm_blocking_get_port methodolgy, if i use how to configure from the test.
Thanks in advance

A few questions to understand you right:
(1) your DUT has a specific pinlevel interface which is used only for configuring the DUT?
(2) This configuration interface is not used for anything else?

In this case you might use an agent without a monitor.
You can specify y configuration test which uses a configuration sequence to configure your DUT.

When you are using a UVM Framework Generator it doesn’t matter to create also a monitor, but you do not implement anything there.
Using the agent architecture helps you for future projects with respect to reusability.

In reply to chr_sue:

Hi,
To answer your questions,

  1. MY DUT has specific mode pin level interface used for configuring the DUT
  2. No, Only used for mode configuration.

So, I can create a configuration test which has configuration sequence to configure the DUT through sequencer, driver right ?

I will look into UVM framework generator in detail & get back to you.

Thanks in advance

In reply to sanjai_483:
For the UVM Framework Generator free-of-charge see here:
https://www.doulos.com/knowhow/sysverilog/uvm/