Can uvm_mem bet setup and then updated to DUT similar to registers?

In RALs that consist of registers you can set their values and/or fields and then call update() on the register block to have only the updated registers written to the DUT. But in the memory instances that are uvm_mem or classes that extend uvm_mem, there doesn’t appear to be any kind of set function. Only write can be called with instantly writes the data to the DUT. Is there a way to pre-populate the memory information and then have the register block push out the offset+data values to the DUT?

In reply to AdamB:

No. uvm_mem does not mirror the contents of DUT memory out of concern for host CPU memory resources. You still have back_door access.

If you really need the full functionality of uvm_reg, use a reg array.