C Based Soc Verification

UVM
1

Hi

can we use c programming for soc verification.
How the uvm/sv will be used at the silicon level.
are we converting the sv/ sequences to c to run simulation in silicon level
please provide some inputs on why can’t we use C in VLSI

Thanks in advance

Regards,
Sudarshan

2

In reply to Mechanic:

“C programming” can mean different things to different people. I suggest reading:

C Based Stimulus

Easy Steps Towards Virtual Prototyping using the SystemVerilog DPI

3

In reply to dave_59:

Thanks Dave

could you please throw me some inputs how are we reusing
the sequences which are coded using sv/uvm at actual silicon level

could you please point me some references that would be a
great help in understanfing the full chip verification at silicon

Thanks in Advance

Regards,
Sudarshan