Block level hookups in chip enviornment

UVM
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1

Hello,

When reusing block level environment in chip environment, should we keep the interface connections at the same level or move it up? (assuming signals just pass through hierarchy ex: for spi, agent can be hooked up block interface or chip interface?)

what is recommended considering proper reuse?

Regards,
Manju Shetty

2

In reply to manjubshetty:

If you have the same functional pin interfaces you Can either reuse your agents or even your blocklevel environment in your toplevel testbench. It depends on your architectural and coding guidelines you have in your company.