Best Interface Sharing Technique between IP/Sub-System and SOC Flows?

UVM
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1

Hello !!

Which would be the best technique for sharing interface between IP/Subsystem with the SOC flow.

  1. Traditionally we instance the interface at the IP tb top and put it inside the uvm_config_db and then get the config inside the test/environment and store it into the respective env config db and pass to the leaf level components.

  2. But if I wanted to provide my IP/Sub-system to SoC flows, I do need to do the same @ the SOC tb top.

  3. I do see some flows/docs on UVM interface Harness where in they bind that interface harness to the DUT etc.

But is there any other best practise/techniques which is being used in the industry ? Might be a sought out question or might people have asked or worked on exhaustively. But it would be great if any one can share some of their experience.

Thanks in Advance !

2

In reply to desperadorocks:

Any comments from the industry experts ? @Dave, @Tom, @Mark Glasser ?? Please share your best practice methods.

3

In reply to desperadorocks:

There is not 1 approach. I depends on the specific requirements. Of high importance is if your functional interfaces are still available in the SoC or not.
Of course you cannot reuse the toplevel module of your blocklevel testbench.

4

In reply to chr_sue:

@Chris : Thanks for responding back.

  1. IP/Sub-System level interface will be very-well used @ the SOC.
  2. But mainly looking for techniques where we can smoothly re-use the instantiation / provide API’s for the SOC so that just instancing or calling them does the required interface instance [apart from the required static with virtual interfcae binding].

I am looking for generic/general best way to plan/define the interface @ the IP level TB/ENV which can be re-used @ the SOC. Kindly share your experience !

5

In reply to desperadorocks:

I find this paper from Verilab presented in 2017 to be very useful and we are currently considering applying this method for all new developments: Verification Prowess with the UVM Harness

6

In reply to desperadorocks:

An approach depends on things like does the IP interface exist on the SOC toplevel or is it ian internal interface.

7

In reply to chr_sue:

The proposed approach the IP interface does not need to exist at SOC toplevel and can easily be an internal interface. The technique leverage port coercion and the usage of stub modules to remove design drivers and use the VIP drivers instead.