Hi All ,
I have started my RAL journey and have reached a hurdle for which I seek the Forums help .
Currently I am trying to understand Backdoor Access in RAL and I see that there are a few ways to specify the hdl_path .
Within class uvm_reg we have 3 methods ::
(i) configure [ Called from build() function of Reg_block which creates the register and has option of providing 3rd argument as hdl_path ]
(ii) add_hdl_path [ Doubt related to this method ]
(iii) add_hdl_path_slice [ Typically called from build() function of user_register ]
Assume we have the following register definitions :: Register_Definition
Consider the following two scenarios ::
(1) Register comprising of multiple fields. Concatenation of these fields ( along with possibly reserved bits which are 0’s ) gives us the register value .
( Eg : reg1 in above code )
(2) Register with only 1 field .
Case 1 : The field occupies the entire size of register ( Eg : reg3 in above code )
Case 2 : The field occupies portion of the register size with remaining bits as reserved ( 0’s ) ( Eg : reg2 in above code )
I have the following understanding . Please Correct me if wrong
(a) For registers reg2 and reg3 the hdl_path is specified via 3rd argument to configure ( via Method (i) ) as the registers comprises of only 1 register field
(b) For register reg1 the hdl_path is specified via add_hdl_path_slice ( via Method (iii) ) as there are multiple fields within the register
Have the following queries ::
[Q1]When should Method (ii) i.e add_hdl_path be called ?
Can it be called for ALL the 3 registers above ? i.e for both scenarios ( single / multiple fields )
**[Q2] For reg1 can the hdl_path be specified via configure / add_hdl_path ( i.e either of the 2 ) ?
[Q3] Can the 3 methods be called interchangeably OR do each of them serve specific purpose ?**