In the uvm_reg method
bit first = 0,
string kind = "RTL")
is the string name the name of the register field or is it the name of the RTL counterpart?
For example, say I have a 32 bit register X with a_x,b_x,c_x fields that occupy certain bits of the register. [ X = a_x, X = b_x, X = c_x] These fields have corresponding flops (a,b,c) on the rtl and the other bits are unused. How is the hdl path added for such a case?
//In X reg file build function
a_x.configure(this, 1, 3);
b_x.configure(this, 1, 5);
c_x.configure(this, 1, 31);
add_hdl_path_slice("", 3, 1); //for a_x would the string name be a_x or a?
for a_x would the string name be a_x or a?