Add_hdl_path_slice for gates in UVM

Hello respected person,
I am using add_hdl_path_slice for gates.
As per function it is add_hdl_path_slice(name,offset,size,first,kind), where kind have value “RTL” or “GATES”.
But I think you are using the value “GATES” at position of ‘first’.
I am getting different results if I use as .kind(“GATES”).

Cookbook example:

// Add the ctrl hdl_path starting at bit 0, hardware target is 14 bits wide
ctrl_reg.add_hdl_path_slice(“ctrl”, 0, 14); // “RTL” by default
ctrl_reg.add_hdl_path_slice(“ctrl_dff.q”, 0, 14, “GATES”); // Gate level spec
//
// …

UVM HTML file:

function void add_hdl_path_slice( string name,
int offset,
int size,
bit first = 0,
string kind = “RTL” )

In reply to Tarun Kumar Sharma:

Finally I got the correct syntax for gates.

Cookbook and video have erroneous code.