To add the clock delay in sequence using existing interface clock signal present in the interface

UVM
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I want to add a two clock delay in the sequence using the existing clock signal present in the interface. My sequencer,driver,env are not visible. How to add the delay?

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In reply to suvendra kumar sahoo:
There are a few things you can do with the sequence_item that you send to the driver

  • You can add a field to the transaction representing a delay for each item. Then your driver delays each transaction by the number of cycles
  • If your transaction is already command based (i.e. read, write, …) you can add another command that represents a cycle delay.
  • And, if you do not want or cannot change the sequence/driver, you can add another sequence/driver combination that is just there to count clock cycles. Many people also create a clock/reset interface solely for generating/waiting on clocks, and driving reset.