# UVM macro

**URL:** <https://verificationacademy.com/forums/t/uvm-macro/33581>\
**Category:** UVM\
**Tags:** UVM\
**Created:** [October 8, 2017, 5:27am UTC](https://verificationacademy.com/forums/t/uvm-macro/33581 "2017-10-08T05:27:37Z")\
**Posts on this page:** 6\
**Page:** 1

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**Author:** ![verificationstud](https://verificationacademy.com/forums/user_avatar/verificationacademy.com/verificationstud/32/3335_2.png) [@verificationstud](https://verificationacademy.com/forums/u/verificationstud)\
**Post date:** [October 8, 2017, 5:27am UTC](https://verificationacademy.com/forums/t/uvm-macro/33581/1 "2017-10-08T05:27:37Z")

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How can I implement factory registration without using macros.

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**Author:** ![dave\_59](https://verificationacademy.com/forums/user_avatar/verificationacademy.com/dave_59/32/4499_2.png) [@dave\_59](https://verificationacademy.com/forums/u/dave_59)\
**Post date:** [October 8, 2017, 5:55am UTC](https://verificationacademy.com/forums/t/uvm-macro/33581/2 "2017-10-08T05:55:49Z")

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_In reply to [harinathdigital@gmail.com](https://verificationacademy.com/forums/t/uvm-macro/33581):_

> **[Parameterized Classes, Static Members and the Factory Macros - Verification...](https://blogs.sw.siemens.com/verificationhorizons/2011/02/13/parameterized-classes-static-members-and-the-factory-macros/)**
>
> Somebody asked me a simple question: Why do need two different macros (\`ovm\_object\_utils and \`ovm\_object\_param\_utils) to register classes with the factory,

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**Author:** ![lalithjithan](https://verificationacademy.com/forums/letter_avatar_proxy/v4/letter/l/8e8cbc/32.png) [@lalithjithan](https://verificationacademy.com/forums/u/lalithjithan)\
**Post date:** [October 8, 2017, 6:01am UTC](https://verificationacademy.com/forums/t/uvm-macro/33581/3 "2017-10-08T06:01:11Z")

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class component extends uvm\_component;  
typedef uvm\_component\_registry #(component,“component”) type\_id;

static function type\_id get\_type();  
return type\_id::get();  
endfunction

function string get\_type\_name();  
return “component”;  
endfunction

endclass : component

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<div class="post-metadata">

**Author:** ![tan\_27](https://verificationacademy.com/forums/letter_avatar_proxy/v4/letter/t/df788c/32.png) [@tan\_27](https://verificationacademy.com/forums/u/tan_27)\
**Post date:** [September 22, 2026, 6:36am UTC](https://verificationacademy.com/forums/t/uvm-macro/33581/4 "2026-09-22T06:36:44Z")

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Could you please explain why do we use type\_id?  
What are the static methods inside uvm\_component\_registry and why is it parameterized with 2 arguments?

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**Author:** ![dave\_59](https://verificationacademy.com/forums/user_avatar/verificationacademy.com/dave_59/32/4499_2.png) [@dave\_59](https://verificationacademy.com/forums/u/dave_59)\
**Post date:** [September 23, 2026, 7:06am UTC](https://verificationacademy.com/forums/t/uvm-macro/33581/5 "2026-09-23T07:06:52Z")

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The UVM factory has two basic override mechanisms: a type-based override, which undergoes static compilation checks, and a string-based lookup, which can only be checked at runtime. The registry class accepts two arguments, linking the string to a specific class type.

The factory plays a crucial role in the overall functioning of the UVM, and I can’t provide a comprehensive explanation here. For a detailed understanding, I recommend reading the verification horizon article mentioned above, as well as the DVCon paper it references.

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<div class="post-metadata">

**Author:** ![tan\_27](https://verificationacademy.com/forums/letter_avatar_proxy/v4/letter/t/df788c/32.png) [@tan\_27](https://verificationacademy.com/forums/u/tan_27)\
**Post date:** [September 23, 2026, 8:03am UTC](https://verificationacademy.com/forums/t/uvm-macro/33581/6 "2026-09-23T08:03:52Z")

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Thank you !