# Setting the interface handle into config tb from top tb module

**URL:** <https://verificationacademy.com/forums/t/setting-the-interface-handle-into-config-tb-from-top-tb-module/39891>\
**Category:** SystemVerilog\
**Tags:** SystemVerilog, uvm\_config\_db\
**Created:** [December 16, 2021, 2:52pm UTC](https://verificationacademy.com/forums/t/setting-the-interface-handle-into-config-tb-from-top-tb-module/39891 "2021-12-16T14:52:43Z")\
**Posts on this page:** 5\
**Page:** 1

<div class="post-metadata">

**Author:** ![jaswanth\_b](https://verificationacademy.com/forums/letter_avatar_proxy/v4/letter/j/b19c9b/32.png) [@jaswanth\_b](https://verificationacademy.com/forums/u/jaswanth_b)\
**Post date:** [December 16, 2021, 2:52pm UTC](https://verificationacademy.com/forums/t/setting-the-interface-handle-into-config-tb-from-top-tb-module/39891/1 "2021-12-16T14:52:43Z")

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Hi,

I need some help regarding the setting of interface to config db in top tb module and which in turn set into agent from env.

basically my implementation is shown as below

```verilog

module top_tb;
// ports
 
// i have a genvar for loop 
genvar i;
for (i=0; i<5; i++) begin : gen
  //interface instance
  xyz_if m_if;
 
  //module instance to which the interface is passed 
  module1 m1(m_if);
 
  // i am trying to set the same if into config db here 
  initial begin
   if(i==1)
   uvm_config_db#(virtual xyz_if)::set(uvm_root::get(), "uvm_test_top.env*", "vif", m_if);
  end  
 
end //for loop
endmodule
end

```

will this work, please help.  
other process i tried is below, after for loop i added this way

```verilog

initial begin
for (int i =0; i<3; i++) begin
   uvm_config_db#(virtual xyz_if)::set(uvm_root::get(), "uvm_test_top.env*", "vif", gen[i].m_if);
end
end

```

i am getting error at gen[i] place.  
help me to use the correct way

Thanks

---

<div class="post-metadata">

**Author:** ![cgales](https://verificationacademy.com/forums/letter_avatar_proxy/v4/letter/c/ccd318/32.png) [@cgales](https://verificationacademy.com/forums/u/cgales)\
**Post date:** [December 16, 2021, 3:05pm UTC](https://verificationacademy.com/forums/t/setting-the-interface-handle-into-config-tb-from-top-tb-module/39891/2 "2021-12-16T15:05:47Z")

</div>

_In reply to [jaswanth\_b](https://verificationacademy.com/forums/t/setting-the-interface-handle-into-config-tb-from-top-tb-module/39891):_

You don’t mention what kind of error you are getting (compilation, run time, wrong value, etc), so these are some general recommendations:

- Only target uvm\_test\_top with your interface handle
- Use ‘null’ for context when at the top testbench level
- Don’t use ‘\*’ for a target as this can result in conflicts
- Every string name used should be unique so that the test can assign the correct interface handle to the correct agent
- In your test, get each handle and assign it to each agent’s (or environment) configuration object

```verilog

module top_tb;
// ports

// i have a genvar for loop 
genvar i;
for (i=0; i<5; i++) begin : gen
  //interface instance
  xyz_if m_if;

  //module instance to which the interface is passed 
  module1 m1(m_if);
 
  // i am trying to set the same if into config db here 
  initial begin
    uvm_config_db#(virtual xyz_if)::set(null, "uvm_test_top", $sformatf("vif%0d",i), m_if);
  end
end //for loop
endmodule

```

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<div class="post-metadata">

**Author:** ![jaswanth\_b](https://verificationacademy.com/forums/letter_avatar_proxy/v4/letter/j/b19c9b/32.png) [@jaswanth\_b](https://verificationacademy.com/forums/u/jaswanth_b)\
**Post date:** [December 16, 2021, 3:30pm UTC](https://verificationacademy.com/forums/t/setting-the-interface-handle-into-config-tb-from-top-tb-module/39891/3 "2021-12-16T15:30:23Z")

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_In reply to [cgales](https://verificationacademy.com/forums/t/setting-the-interface-handle-into-config-tb-from-top-tb-module/39891/2):_

Hi,

Thanks for the reply  
actually issue is i am getting the wrong value in my usage.

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<div class="post-metadata">

**Author:** ![jaswanth\_b](https://verificationacademy.com/forums/letter_avatar_proxy/v4/letter/j/b19c9b/32.png) [@jaswanth\_b](https://verificationacademy.com/forums/u/jaswanth_b)\
**Post date:** [December 16, 2021, 3:31pm UTC](https://verificationacademy.com/forums/t/setting-the-interface-handle-into-config-tb-from-top-tb-module/39891/4 "2021-12-16T15:31:14Z")

</div>

_In reply to [jaswanth\_b](https://verificationacademy.com/forums/t/setting-the-interface-handle-into-config-tb-from-top-tb-module/39891/3):_

Can you please explain more about this:

- “In your test, get each handle and assign it to each agent’s (or environment) configuration object”

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<div class="post-metadata">

**Author:** ![cgales](https://verificationacademy.com/forums/letter_avatar_proxy/v4/letter/c/ccd318/32.png) [@cgales](https://verificationacademy.com/forums/u/cgales)\
**Post date:** [December 16, 2021, 5:56pm UTC](https://verificationacademy.com/forums/t/setting-the-interface-handle-into-config-tb-from-top-tb-module/39891/5 "2021-12-16T17:56:08Z")

</div>

_In reply to [jaswanth\_b](https://verificationacademy.com/forums/t/setting-the-interface-handle-into-config-tb-from-top-tb-module/39891/4):_

It is recommended to have a configuration object for each agent. This configuration object contains all the information used by the agent to control its behavior. Part of this configuration object should be the virtual interface handle to be used by the agent.

The environment configuration object will contain all the agent configuration objects. It is created as part of the test and passed to the environment, which will then pass the agent configuration objects to the correct agent.