# Question on "local variable flowing out of ORing of two sequences"

**URL:** <https://verificationacademy.com/forums/t/question-on-local-variable-flowing-out-of-oring-of-two-sequences/41772>\
**Category:** SystemVerilog\
**Tags:** SystemVerilog\
**Created:** [June 7, 2023, 9:47am UTC](https://verificationacademy.com/forums/t/question-on-local-variable-flowing-out-of-oring-of-two-sequences/41772 "2023-06-07T09:47:20Z")\
**Posts on this page:** 1\
**Showing post:** 8

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**Author:** ![hisingh](https://verificationacademy.com/forums/letter_avatar_proxy/v4/letter/h/97f17d/32.png) [@hisingh](https://verificationacademy.com/forums/u/hisingh)\
**Post date:** [June 12, 2023, 4:17pm UTC](https://verificationacademy.com/forums/t/question-on-local-variable-flowing-out-of-oring-of-two-sequences/41772/8 "2023-06-12T16:17:04Z")

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_In reply to [ben@SystemVerilog.us](https://verificationacademy.com/forums/t/question-on-local-variable-flowing-out-of-oring-of-two-sequences/41772/7):_

Thanks Ben .  
So when vld[-\>1] is true for 2nd time , the previous value of sum ( assigned when vld[-\>1] was true for 1st time ) is used to calculate the new value of sum.

So had we written :

```verilog

property p_check_msg_BAD2;
 BITS_4 sum;
 bit result;
 ($rose(go), sum=0) |-> ( 
 ( ( vld[->1], sum=sum+data )[*3] ) or ( $fell(go)[->1] , sum = sum+data ) )
  ##0 ( 1 , result = check_sum_simple(sum, data) ) ##0 result; 
endproperty

```

Assuming that $fell(go) is never true , **the ‘or’ operator is true only when vld[-\>1] is true thrice ( sum is assigned thrice as well )**

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