# OVM Sample Called, Still Yielding 0% Coverage

**URL:** <https://verificationacademy.com/forums/t/ovm-sample-called-still-yielding-0-coverage/31999>\
**Category:** Coverage\
**Tags:** OVM-coverage, Coverage\
**Created:** [June 29, 2016, 10:57pm UTC](https://verificationacademy.com/forums/t/ovm-sample-called-still-yielding-0-coverage/31999 "2016-06-29T22:57:58Z")\
**Posts on this page:** 1\
**Showing post:** 3

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**Author:** ![rachel.greenlee](https://verificationacademy.com/forums/letter_avatar_proxy/v4/letter/r/b19c9b/32.png) [@rachel.greenlee](https://verificationacademy.com/forums/u/rachel.greenlee)\
**Post date:** [June 30, 2016, 4:09pm UTC](https://verificationacademy.com/forums/t/ovm-sample-called-still-yielding-0-coverage/31999/3 "2016-06-30T16:09:40Z")

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_In reply to [dave\_59](https://verificationacademy.com/forums/t/ovm-sample-called-still-yielding-0-coverage/31999/2):_

This is my first time to make a coverage class, and I think there are gaps in my understanding as to what occurs when I call sample(). My intention is to, like I said, set the bin only when the data is \> 0. Could I do something like

```verilog
 bins x = {array1}; 

```

and achieve my desired results?

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