Failed to find uvm_hdl_deposit in DPI

How to resolve this Dpi error?

# Reading C:/questasim64_10.2c/tcl/vsim/pref.tcl 
# //  Questa Sim-64
# //  Version 10.2c Unknown Platform Jul 19 2013
# //
# //  Copyright 1991-2013 Mentor Graphics Corporation
# //  All Rights Reserved.
# //
# //  THIS WORK CONTAINS TRADE SECRET AND PROPRIETARY INFORMATION
# //  WHICH IS THE PROPERTY OF MENTOR GRAPHICS CORPORATION OR ITS
# //  LICENSORS AND IS SUBJECT TO LICENSE TERMS.
# //
cd G:/I2C
pwd
# G:/I2C
ls
# Env
# RTL
# Sim
# Test
# Top
cd sim
# reading modelsim.ini
ls
# complie.log
# modelsim.ini
# run.do
# run.do~
# simulation.log
# vsim.wlf
# work
do run.do
# ** Warning: (vlib-34) Library already exists at "work".
# 
# Modifying modelsim.ini
# QuestaSim-64 vlog 10.2c Compiler 2013.07 Jul 19 2013
# -- Compiling package uvm_pkg (uvm-1.1d Built-in)
# -- Compiling interface i2c_if
# -- Compiling package top_sv_unit
# -- Importing package uvm_pkg (uvm-1.1d Built-in)
# -- Compiling interface i2c_if
# -- Compiling module i2c_mem
# -- Compiling module top
# 
# Top level modules:
# 	top
# vsim +UVM_TESTNAME=test +define+UVM_CMDLINE_NO_DPI -l simulation.log -c -sv_seed random top 
# Loading sv_std.std
# Loading work.uvm_pkg(fast)
# Loading work.top_sv_unit(fast)
# ** Note: (vsim-8785) UVM-aware debugging capabilities will be disabled since no compiled "questa_uvm_pkg" can be found.
# 
# This also means that later if you turn on UVM-aware debugging your debug simulations may have
# 
# different random seeds from your non-debug simulations.
# 
# Loading work.top(fast)
# ** Warning: (vsim-3770) Failed to find user specified function 'uvm_hdl_check_path' in DPI C/C++ source files.
#    Time: 0 ns  Iteration: 0  Region: /uvm_pkg File: C:/questasim64_10.2c/verilog_src/uvm-1.1d/src/uvm_pkg.sv
# ** Warning: (vsim-3770) Failed to find user specified function 'uvm_hdl_deposit' in DPI C/C++ source files.
#    Time: 0 ns  Iteration: 0  Region: /uvm_pkg File: C:/questasim64_10.2c/verilog_src/uvm-1.1d/src/uvm_pkg.sv
# ** Warning: (vsim-3770) Failed to find user specified function 'uvm_hdl_force' in DPI C/C++ source files.
#    Time: 0 ns  Iteration: 0  Region: /uvm_pkg File: C:/questasim64_10.2c/verilog_src/uvm-1.1d/src/uvm_pkg.sv
# ** Warning: (vsim-3770) Failed to find user specified function 'uvm_hdl_release_and_read' in DPI C/C++ source files.
#    Time: 0 ns  Iteration: 0  Region: /uvm_pkg File: C:/questasim64_10.2c/verilog_src/uvm-1.1d/src/uvm_pkg.sv
# ** Warning: (vsim-3770) Failed to find user specified function 'uvm_hdl_release' in DPI C/C++ source files.
#    Time: 0 ns  Iteration: 0  Region: /uvm_pkg File: C:/questasim64_10.2c/verilog_src/uvm-1.1d/src/uvm_pkg.sv
# ** Warning: (vsim-3770) Failed to find user specified function 'uvm_hdl_read' in DPI C/C++ source files.
#    Time: 0 ns  Iteration: 0  Region: /uvm_pkg File: C:/questasim64_10.2c/verilog_src/uvm-1.1d/src/uvm_pkg.sv
# Sv_Seed = 4072907857
# ----------------------------------------------------------------
# UVM-1.1d
# (C) 2007-2013 Mentor Graphics Corporation
# (C) 2007-2013 Cadence Design Systems, Inc.
# (C) 2006-2013 Synopsys, Inc.
# (C) 2011-2013 Cypress Semiconductor Corp.
# ----------------------------------------------------------------
# 
#   ***********       IMPORTANT RELEASE NOTES         ************
# 
#   You are using a version of the UVM library that has been compiled
#   with `UVM_NO_DEPRECATED undefined.
#   See http://www.eda.org/svdb/view.php?id=3313 for more details.
# 
#   You are using a version of the UVM library that has been compiled
#   with `UVM_OBJECT_MUST_HAVE_CONSTRUCTOR undefined.
#   See http://www.eda.org/svdb/view.php?id=3770 for more details.
# 
#       (Specify +UVM_NO_RELNOTES to turn off this notice)
# 
# UVM_WARNING @ 0: reporter [BDTYP] Cannot create a component of type 'test' because it is not registered with the factory.
# UVM_FATAL @ 0: reporter [INVTST] Requested test from call to run_test(test) not found.
# 
# --- UVM Report Summary ---
# 
# ** Report counts by severity
# UVM_INFO :    0
# UVM_WARNING :    1
# UVM_ERROR :    0
# UVM_FATAL :    1
# ** Report counts by id
# [BDTYP]     1
# [INVTST]     1
# ** Note: $finish    : C:/questasim64_10.2c/verilog_src/uvm-1.1d/src/base/uvm_report_object.svh(292)
#    Time: 0 ns  Iteration: 0  Instance: /top
# 1
# Break in Function uvm_pkg/uvm_report_object::die at C:/questasim64_10.2c/verilog_src/uvm-1.1d/src/base/uvm_report_object.svh line 292
# Simulation Breakpoint: 1
# Break in Function uvm_pkg/uvm_report_object::die at C:/questasim64_10.2c/verilog_src/uvm-1.1d/src/base/uvm_report_object.svh line 292
# MACRO ./run.do PAUSED at line 19

Why do you have that? Remove it from your vlog command (and related ones).