# Clock oscillator for testbench

**URL:** <https://verificationacademy.com/forums/t/clock-oscillator-for-testbench/50901>\
**Category:** SystemVerilog\
**Created:** [July 24, 2025, 12:11pm UTC](https://verificationacademy.com/forums/t/clock-oscillator-for-testbench/50901 "2025-07-24T12:11:04Z")\
**Posts on this page:** 1\
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**Author:** ![dave\_59](https://verificationacademy.com/forums/user_avatar/verificationacademy.com/dave_59/32/4499_2.png) [@dave\_59](https://verificationacademy.com/forums/u/dave_59)\
**Post date:** [July 24, 2025, 4:26pm UTC](https://verificationacademy.com/forums/t/clock-oscillator-for-testbench/50901/2 "2025-07-24T16:26:27Z")

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Please [format your code](https://verificationacademy.com/forums/t/please-format-your-code-with-markdown-tags/28078) making your code easier for others to read. I have done that for you.

Nonblocking assignments are used to prevent race conditions between synchronous logic blocks. NBAs have higher overhead compared to regular blocking assignments, so they should only be used when absolutely necessary.

The clock signal is not in a race with any other process so regular blocking assignment should be used.

The reason `initial/forever` is used instead of `always` is when there are multiple clocks, as it’s easier to introduce a skew.

```auto
initial begin
   clk1 = 1;
   #2 forever #5 clk1 = ! clk1;
end
initial begin
   clk2 = 0;
   #4 forever #5 clk2 = ! clk2;
end

```

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