# Back door access for uvm\_mem

**URL:** <https://verificationacademy.com/forums/t/back-door-access-for-uvm-mem/40973>\
**Category:** UVM\
**Tags:** UVM\
**Created:** [November 3, 2022, 3:59pm UTC](https://verificationacademy.com/forums/t/back-door-access-for-uvm-mem/40973 "2022-11-03T15:59:15Z")\
**Posts on this page:** 4\
**Page:** 1

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**Author:** ![Geet](https://verificationacademy.com/forums/letter_avatar_proxy/v4/letter/g/3ec8ea/32.png) [@Geet](https://verificationacademy.com/forums/u/Geet)\
**Post date:** [November 3, 2022, 3:59pm UTC](https://verificationacademy.com/forums/t/back-door-access-for-uvm-mem/40973/1 "2022-11-03T15:59:15Z")

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Hi All,

How can we add path for memory to access back-door.  
There are lot of questions/information on accessing the back door register not for uvm\_mem.

I’m looking a back door access of memory derived from uvm\_mem.

For an example:

class my\_mem extends uvm\_mem;  
…

In top reg class:

my\_mem\_h = my\_mem :: type\_id::create(“my\_mem\_h”);  
my\_mem\_h.configure(this,“my\_mem\_h”);

From test I need a following:

top\_block.read(status,read\_data\_mem,UVM\_BACKDOOR);

Now uvm\_mem methods to add hdl path:

// Function: add\_hdl\_path  
//  
// Add an HDL path  
//  
// Add the specified HDL path to the memory instance for the specified  
// design abstraction. This method may be called more than once for the  
// same design abstraction if the memory is physically duplicated  
// in the design abstraction  
//  
extern function void add\_hdl\_path (uvm\_hdl\_path\_slice slices,  
string kind = “RTL”);

1. How we can do a back-door access here?
2. How to add a path here?

Any example would be appreciated.

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**Author:** ![rgarcia07](https://verificationacademy.com/forums/letter_avatar_proxy/v4/letter/r/a87d85/32.png) [@rgarcia07](https://verificationacademy.com/forums/u/rgarcia07)\
**Post date:** [November 3, 2022, 4:06pm UTC](https://verificationacademy.com/forums/t/back-door-access-for-uvm-mem/40973/2 "2022-11-03T16:06:07Z")

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_In reply to [Geet](https://verificationacademy.com/forums/t/back-door-access-for-uvm-mem/40973):_

This [UVM register user-defined memory backdoor - EDA Playground](https://www.edaplayground.com/x/6DJg) might be helpful  
and this presentation as well [Doing Funny Stuff with the UVM Register Layer: Experiences Using Front Door Sequences, Predictors, and Callbacks – DVCon Proceedings Archive](https://dvcon-proceedings.org/document/doing-funny-stuff-with-the-uvm-register-layer-experiences-using-front-door-sequences-predictors-and-callbacks-presentation/)

HTH,

-R

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<div class="post-metadata">

**Author:** ![Geet](https://verificationacademy.com/forums/letter_avatar_proxy/v4/letter/g/3ec8ea/32.png) [@Geet](https://verificationacademy.com/forums/u/Geet)\
**Post date:** [November 4, 2022, 10:53am UTC](https://verificationacademy.com/forums/t/back-door-access-for-uvm-mem/40973/3 "2022-11-04T10:53:18Z")

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_In reply to [rgarcia07](https://verificationacademy.com/forums/t/back-door-access-for-uvm-mem/40973/2):_

Hi,

I was looking for uvm\_mem. Not uvm\_reg\_backdoor.  
Anyways, Got solution by myself by reading several methods on How to add path.

It can be done using providing path in configure method.  
my\_mem\_h = my\_mem :: type\_id::create(“my\_mem\_h”);  
my\_mem\_h.configure(this,“RTL\_PATH\_TO\_LOCATION”);

Still facing below error:  
UVM\_ERROR /proj/eda/CADENCE/XLM/20.09.009/tools/methodology/UVM/CDNS-1.1d/sv/src/reg/uvm\_reg\_block.svh(2049) @ 11020.00 ns: reporter [RegModel] Block does not have hdl path defined for abstraction ‘RTL’

I’m trying to access  
top\_reg\_block.my\_mem.read(offset,read\_data,UVM\_BACKDOOR);  
Can we not read/write using read method with UVM\_BACKDOOR of uvm\_mem class?

If anyone has small pseudo code with uvm\_mem, Please share.

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**Author:** ![kevin.young](https://verificationacademy.com/forums/letter_avatar_proxy/v4/letter/k/e8c25b/32.png) [@kevin.young](https://verificationacademy.com/forums/u/kevin.young)\
**Post date:** [March 13, 2026, 4:37pm UTC](https://verificationacademy.com/forums/t/back-door-access-for-uvm-mem/40973/4 "2026-03-13T16:37:37Z")

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Were you ever able to find a solution for this? I also experienced the same UVM\_ERROR. Thanks!
