Why randomize () is called inside the initial block which is in a module?

Hi,

I understand that class is dynamic and module is static.
In the below example I see that the rand variables are declared in the class. But the randomize() function is being called in the initial block of the module. In some other examples, I see randomize() being called in the initial block that sits inside the class.

I am confused as in what is the correct way of calling the randomize() method and why?
I tried searching this online but I am not convinced with the answers.

Any help would be much appreciated.

Sample example:

class packet;
  rand byte addr;
  rand byte data;  
endclass
 
module rand_methods;
  initial begin
    packet pkt;
    pkt = new();
     
    //calling randomize method
    pkt.randomize();
     
    $display("\taddr = %0d \t data = %0d",pkt.addr,pkt.data);
  end
endmodule

Thank you.

In reply to sk7799:

There are no initial blocks inside classes. Procedural processes are started with initial/always procedures inside a module or interface. You can have a call to randomize() inside a class method, but that class method has to called from an initial/always procedure, or another method/procedure. The point is something static has to be at the root of a call chain.

In reply to dave_59:

Hi Dave,

Thank you for your response.
It’s much clear for me now.

In reply to sk7799:

what is the correct way of calling the randomize() method and why?

That depends on your verification methodology and your goals. Consider the following possibilities:

  • UVM methodology Here your randomize will be in the sequence

class rand_seq extends uvm_sequence #( counter_xactn, counter_xactn );
...
task body();
req = counter_xactn::type_id::create("req");
forever begin
start_item(req);
// The contents of the sequence item are populated between the calls to
// start_item() and finish_item(), either through directed or randomized means.
// assert(req.randomize()); // ** AVIOD THIS
if (!req.randomize()) `uvm_error("MYERR", "This is a randomize error");
//`uvm_info({get_type_name(),":body"},{"Sending transaction ",req.convert2string()}, OVM_MEDIUM)
finish_item(req);
//`uvm_info("rand_seq", "finished_item in task body ovm_low", OVM_LOW)
end
endtask: body
endclass: rand_seq 

class simple_random_sequence;
transaction tx=new();
virtual task run();
if (!randomize(tx))  `uvm_error("MYERR", "This is a randomize error");
// if(!randomize(tx))  $error("randomization failure");
endtask : run
endclass : simple_random_sequence
module tb;
...
// test using simple_random_sequence
always @ (posedge clk) begin : random1
..
for (int i=0; i<40; i++) begin : for1
simple_rand_sequence_ld_mostly_hi.run();
data_in <= simple_rand_sequence_ld_mostly_hi.tx.data;
ld <= simple_rand_sequence_ld_mostly_hi.tx.ld;
@ (posedge clk);
end : for1
$finish;
end : random1 
  • Quick testbench I randomize in the initial statement. I do that to test my assertions

module top;
timeunit 1ns;  timeprecision 100ps;
`include "uvm_macros.svh"   import uvm_pkg::*;
bit clk, a, b, reset_n;
initial forever #10 clk = !clk;
...
// my assertions her
initial begin
bit v_a, v_b, v_err;
repeat (200) begin
@(posedge clk);
if (!randomize(v_a, v_b, v_err) with {
v_a   dist {1'b1 := 1, 1'b0 := 1};
v_b   dist {1'b1 := 1, 1'b0 := 2};
v_err dist {1'b1 := 1, 1'b0 := 15};
}) `uvm_error("MYERR", "This is a randomize error");
a <= v_a;
if(v_err==0) b<=v_b; else b<=!v_b;
end
$finish;
end
endmodule

The point, the if (!randomize … can be anywhere…
// (edited) anywhere inside a procedural context.
Ben Cohen
http://www.systemverilog.us/ ben@systemverilog.us
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