Why this fork doesn't work as expected?

SystemVerilog
1

Basically, I am trying to set up a fork to collect the period of a clock inside a fork block, or to return an error after a delay if the clk is frozen.


int clk_period = 0;
fork
   repeat (2) begin
      @(posedge env.vif.clk);
      clk_period = $time - clk_period;
   end
   begin
      #1us;
   end
join_any
disable fork;
if(~clk_period)
   `uvm_error("etc", "etc")

With this code my simulation promptly freezes. The question is why?

2

In reply to Azmo:

Without more context, it is hard to know. You need to debug interactively to see where it is hanging, or add lots of messages.

Also, you need to be care using disable fork to make sure it only kills the child processes in the fork/join_any above it. Soemtimes that means encapsulating the code above an isolating fork begin… end join

int clk_period = 0;
// are there any existing child processes of the current thread at this point?
fork begin : isolation_process
  fork
   repeat (2) begin
      @(posedge env.vif.clk);
      clk_period = $time - clk_period;
   end
   begin
      #1us;
   end
join_any
disable fork; // all children of current process get killed
 end  : isolation_process 
join
if(~clk_period)
   `uvm_error("etc", "etc")
3

In reply to Azmo:

try putting repeat block inside begin end

4

In reply to Azmo:

This code is working fine and not having any issue.(except the error reporting logic, which will report error for non-zero values also.)

5

In reply to vmasina:

In reply to Azmo:
try putting repeat block inside begin end

Putting a begin/end around a single statement does not do anything.

6

Actually I debugged the issue to another block, that was waiting for the posedge. But Dave’s advice about terminating forks is pretty very solid.