Why are There 2 SDFs Files?

SystemVerilog
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1

I have 2 questions:

1.) In running non-zero delay gate level simulation, why are there 2 SDF files - max.sdf and min.sdf? I mean can we just use 1 SDF file and just specify maxdelays and mindelays for max and min simulation, respectively?

2.) There are 3 fields on the delay section (minimum:typical:maximum). If the typical is missing (1::2), what will be the delay in the simulation for typical? Will it be 0?

2

In reply to Reuben:

This is going to be tools specific - for both the generation and the reading of the SDF. I am going to guess that it is easier for a tool that generates SDF to do it for one set of delays at a time.