When to declare a variable "automatic"? what is the $cast(child, parent) used for?

I know that $cast(dest_handle, source_handle) will check whether the type of dest_handle and source_handle is the same or not before value assignment. I just can’t decide when to use $cast(child, parent),in what kind of scenarios? I often see this kind of syntax in testbench, but feel puzzled about what it is used for, why we assign a parent object to a child handle?
Thanks for answering the two questions above!

In reply to Marina.Miao:

You should really be asking these as two separate posted questions. I help people later when searching for question-answer discussions.

You should never have to use the automatic keyword in class based code. See what is the exact difference between static tasks/functions and automatic tasks/functions ? please explain with a clear example | Verification Academy

For your other question, see Need for the $cast task in System Verilog | Verification Academy

In reply to dave_59:

oh thanks but, I am wondering if it is ok when I declare a variable as automatic in method such as body() task.

In reply to Marina.Miao:

It would be redundant.