Verification of up counter

Hi, for verification of up counter, not getting the expected result. In my driver part only two values that is 0 and 1 (roll over) are going to the DUT.


class count_pkt;
  bit [2:0]qout;
endclass

//*********************GENERATOR***********//

class c_gen;
  count_pkt pkt1;
  mailbox g2d;
  function new(mailbox g2d);
    this.g2d=g2d;
  endfunction
  task cgen();
    begin
      pkt1=new();
      $display("generated packet");
      g2d.put(pkt1);
    end
  endtask
endclass

//**********DRIVER***************//

class c_drv;
  count_pkt pkt1;
  virtual intff viff;
  mailbox g2d,d2s;
  function new(virtual intff viff,mailbox g2d,d2s);
    this.viff=viff;
    this.g2d=g2d;
    this.d2s=d2s;
  endfunction
  task cdrv();
     begin
      g2d.get(pkt1);
       viff.qout=pkt1.qout;
       @(posedge viff.clk)begin
         if(viff.rst)
           pkt1.qout=0;
        else
           pkt1.qout=viff.qout+1;
         end
           @(posedge viff.clk);
          d2s.put(pkt1);
      
      $display("packet driven");
    end
  endtask
endclass
//&*************************MONITOR**************//

class c_mon;
  count_pkt pkt2;
  virtual intff viff;
  mailbox m2s;
  function new(virtual intff viff,mailbox m2s);
    this.viff=viff;
    this.m2s=m2s;
  endfunction
  task cmon();
    pkt2=new();
   begin
     @(posedge viff.clk)
    pkt2.qout=viff.qout;
    m2s.put(pkt2);
    $display("monitor done");
  end
endtask
endclass

//***************SCOREBOARD*************//

class c_score;
  count_pkt pkt1,pkt2;
  mailbox d2s,m2s;
  function new(mailbox d2s,m2s);
    this.m2s=m2s;
    this.d2s=d2s;
  endfunction
  task cscore();
    begin
      m2s.get(pkt2);
      d2s.get(pkt1);
      if(pkt1.qout==pkt2.qout)
        $display("MATCH pkt1_qout=%d pkt2_qout=%d",pkt1.qout,pkt2.qout);
      else
        $display("MISMATCH pkt1_qout=%d pkt2_qout=%d",pkt1.qout,pkt2.qout);
      end
    endtask
  endclass

//*************INTERFACE******************//

interface intff(input logic clk,rst);
logic [2:0]qout;
endinterface

//******************ENVIRONMENT***************//

class c_env;
  count_pkt pkt1;
  virtual intff viff;
  mailbox g2d,d2s,m2s;
  c_gen g1;
  c_drv d1;
  c_mon m1;
  c_score s1;
  function new(virtual intff viff);
    this.viff=viff;
    g2d=new();
    d2s=new();
    m2s=new();
    g1=new(g2d);
    d1=new(viff,g2d,d2s);
    m1=new(viff,m2s);
    s1=new(d2s,m2s);
  endfunction
  task cenv();
    repeat(15)
     begin
      fork 
      g1.cgen();
      d1.cdrv();
      m1.cmon();
      s1.cscore();
      join
    end
  endtask
endclass

//***********************TEST**************//

program c_test(intff vf);
  c_env e1;
  initial begin
    e1=new(vf);
    e1.cenv();
  end
      
endprogram

//***************TOP************************//
module acount_top();
  reg clk=0;
  reg rst;
  initial
  forever #5 clk=!clk;
   intff vf(clk,rst);
  c_test t1(vf);
  c_up t2(vf);
  initial begin
    rst=1;
    #10 rst=0;
  end
      
endmodule
//********************DUT************************************//
module c_up(intff vf); 
  always @(posedge vf.clk) begin
    if(vf.rst)
      vf.qout<=0;
    else
      vf.qout<=vf.qout+1;
    end
  endmodule


In reply to mr.kry:

Please read this article and restate your question.

In reply to mr.kry:

See my response (at the end of the post) on scoreboarding vs assertions
https://verificationacademy.com/forums/systemverilog/equivalent-construct-sv-modelling-clk-verification#reply-89723
Ben Cohen SystemVerilog.us