Using ifdef within ifndef include guard

SystemVerilog
,
1 

`ifndef GUARD_FILE1
`define GUARD_FILE1

class a_class;

  `ifdef DEF_1
    $display("Print def1");
  `else
    $display("Print nothing");
  `endif

endclass

`endif //GUARD_FILE1

endif within the class will intercept ifndef GUARD_FILE1, and making compilation failed. How can I make this work?

2

Your code fails to compile correctly because $display cannot be placed directly into a class unless it’s inside a class method. Also, compile GUARDs are usually unnecessary except maybe macro definition files.