Unable to get instance name of failed assertion

SystemVerilog
,
1

Hi,
When I try to bind module to get assertion like:

module bind_dut(input wire clk,req,reset, output reg gnt);
  always @ (posedge clk) gnt <= req;
endmodule

module assertion_ip(input wire clk_ip, req_ip,reset_ip,gnt_ip);
  sequence req_gnt_seq;
    (~req_ip & gnt_ip)  ##1  (~req_ip & ~gnt_ip);
  endsequence
  property req_gnt_prop;
    @ (posedge clk_ip) 
    disable iff (reset_ip)
    req_ip |=> req_gnt_seq;
  endproperty
  req_gnt_assert : assert property (req_gnt_prop) else $display("@%0dns Assertion Failed", $time);
endmodule
module sub_top1;
  reg clk = 0;
  reg reset, req = 0;
  wire gnt;
  always  #3  clk ++;
  initial begin
    reset <= 1;
    #20  reset <= 0;
    #100  @ (posedge clk) req  <= 1;
    @ (posedge clk) req <= 0;
    #100  @ (posedge clk) req  <= 1;
    repeat (5) @ (posedge clk);
    req <= 0;
  end
  bind_dut dut (clk,req,reset,gnt);
endmodule
module top();
  bind bind_dut   assertion_ip      U_assert_ip (
    .clk_ip   (clk),
    .req_ip   (req),
    .reset_ip (reset),
    .gnt_ip   (gnt)
  );
  sub_top1 m_sub_top1();
  initial $fsdbDumpvars(0,top);
  initial begin
    #300;
    $finish;
  end
endmodule

I would like to get the instances name which req_gnt_assert detect the failure.
For example, when req_gnt_assert gets the error, it would display “@135ns: top.m_sub_top1.dut Assertion Failed”
Please help me on the issue.
Thanks,
Nguyen Ton

2

In reply to NguyenTon:

Look at the display statement edit.



module bind_dut(input wire clk,req,reset, output reg gnt);
  always @ (posedge clk) gnt <= req;
endmodule
 
module assertion_ip(input wire clk_ip, req_ip,reset_ip,gnt_ip);
  sequence req_gnt_seq;
    (~req_ip & gnt_ip)  ##1  (~req_ip & ~gnt_ip);
  endsequence
  property req_gnt_prop;
    @ (posedge clk_ip) 
    disable iff (reset_ip)
    req_ip |=> req_gnt_seq;
  endproperty
  req_gnt_assert : assert property (req_gnt_prop) else $display("%m @%0dns Assertion Failed", $time);
endmodule
module sub_top1;
  reg clk = 0;
  reg reset, req = 0;
  wire gnt;
  always  #3  clk ++;
  initial begin
    reset <= 1;
    #20  reset <= 0;
    #100  @ (posedge clk) req  <= 1;
    @ (posedge clk) req <= 0;
    #100  @ (posedge clk) req  <= 1;
    repeat (5) @ (posedge clk);
    req <= 0;
  end
  bind_dut dut (clk,req,reset,gnt);
endmodule
module top();
  bind bind_dut   assertion_ip      U_assert_ip (
    .clk_ip   (clk),
    .req_ip   (req),
    .reset_ip (reset),
    .gnt_ip   (gnt)
  );
  sub_top1 m_sub_top1();
  //initial $fsdbDumpvars(0,top);
  initial begin
    #300;
    $finish;
  end
endmodule
3

In reply to rag123:

Thanks for your support.However, the command $display(“%m @%0dns Assertion Failed”, $time); just display the place where the assertion instantiated, top.U_assert_ip. I would like to display the name of instance which binds this assertion, top.m_sub_top1.dut.
Thanks,
Nguyen Ton

4

In reply to NguyenTon:

To me looks like a tool issue.

EDA playground



"testbench.sv", 16: top.m_sub_top1.dut.U_assert_ip.req_gnt_assert: started at 237ns failed at 243ns
	Offending '((~req_ip) & gnt_ip)'
top.m_sub_top1.dut.U_assert_ip.req_gnt_assert @243ns Assertion Failed
"testbench.sv", 16: top.m_sub_top1.dut.U_assert_ip.req_gnt_assert: started at 243ns failed at 249ns
	Offending '((~req_ip) & gnt_ip)'
top.m_sub_top1.dut.U_assert_ip.req_gnt_assert @249ns Assertion Failed
"testbench.sv", 16: top.m_sub_top1.dut.U_assert_ip.req_gnt_assert: started at 249ns failed at 255ns
	Offending '((~req_ip) & gnt_ip)'
top.m_sub_top1.dut.U_assert_ip.req_gnt_assert @255ns Assertion Failed
"testbench.sv", 16: top.m_sub_top1.dut.U_assert_ip.req_gnt_assert: started at 255ns failed at 261ns
	Offending '((~req_ip) & gnt_ip)'
top.m_sub_top1.dut.U_assert_ip.req_gnt_assert @261ns Assertion Failed