Turn off constraint

Hi,

Is there any way to turn-off constraint. Suppose, i have 100 constraint. out of 100, i want only one specific constraint should be active and rest of the 99 should be inactive. Is there any in-build function to do that?

Thanks in advance!!!

Hi

Yes , you can turn off constraints with

<object_name>.<constraint_name>.constraint_mode(0) ;

Example :

class Packet;

rand bit [3:0] sof;
rand bit [3:0] eop;
rand bit [7:0] data[];

constraint sof_c
{
sof < 8 ; sof > 2
}

constraint eop_c
{
eop < 8 ; eop > 2
}

endclass : Packet

Program main;

  Packet P = new();

 initial
   begin
    P.sof_c.constraint_mode(0) ; //turn off constraint sof_c

    P.randomize();

    P.sof_c.constraint_mode(1) ; //turn on constraint sof_c

    P.randomize();

    end
endprogram

Hope it is clear else refer SV LRM.

Thanks
Billa

In reply to vikasbilla:

Hi Billa,

If i have to turn off 99 constraints out of 100 constraints, then i have to write “constraint_mode(0)” 99 times. Is there any direct way or in-build function in system verilog to do that??

Thanks!!

There is no built-in mechanism to turn of all but one constraint in a class, unlike the in-line random variable control that would effectively turn rand_mode off for all but one random variable.

You could set up an array of bits to use in an implication constraint

control[0] ->  {block_of_constraints};
control[1] ->  {block_of_constraints};
...

And then it would be relatively straightforward to set the control bits any way you want.

Having 100s of unique constraints in a class seems a bit unusual, you may need to explain further what you are trying to accomplish.

In reply to dave_59:

Thanks Dave !!!