Truncate leading 0s

SystemVerilog
1

Hi,

Is there a way to truncate leading 0s of data, automatically without using any manipulation?

So if design read out data is ‘h006f834e, and it is being stored in a variable, is there a way to automatically omit the leading 0s and store as ‘h6f834e?

Thank you.

2

In reply to UVM_learner6:

i don’t think i understand question properly, but consider for any variable for example bit[31:0] val = 'hFFFF; we didn’t assign any value to upper 16 bits val[31:16] and the value val[31:16] is 'h0000 which default in nature, but design has to read total bit width to get any variable total value…

suppose if we know the total bits that design can use then val_1[15:0] = 'hFFFF; (i.e. use bit slicing to truncate leading 0’s)

hope it helps.

3

In reply to Desam:

Thank you.

But I don’t know how many leading bits will be 0 when we read out.

Yes we can use bit slicing. Was wondering if there is any automated way to leave out leading 0s.

4

In reply to UVM_learner6:

I’m not sure what you mean by “read out”. Variables in digital logic have a fixed number of binary digits. Each digit must be a 0 or 1. If by read out you mean $display, then the “%0h” display formant suppresses the 2 leading 0’s, and “%0b” would suppress 9 leading 0’s.

5

In reply to dave_59:

In reply to UVM_learner6:
I’m not sure what you mean by “read out”. Variables in digital logic have a fixed number of binary digits. Each digit must be a 0 or 1. If by read out you mean $display, then the “%0h” display formant suppresses the 2 leading 0’s, and “%0b” would suppress 9 leading 0’s.

Thanks Dave. What I mean is :

I have an analysis fifo.

uvm_tlm_analysis_fifo #(mtu_out_seq_item) mtu_out_fifo;

I read data from the fifo 4 times using this :
mtu_out_fifo.get(dout_tx);

I concatenate the 4 readouts like this :
full_256b_o_pcie_pkt_wr_data = {fourth_64b_o_pcie_pkt_wr_data, third_64b_o_pcie_pkt_wr_data, second_64b_o_pcie_pkt_wr_data, first_64b_o_pcie_pkt_wr_data};

In this “full_256b_o_pcie_pkt_wr_data”, if I get data that has leading 0s like this :

full_256b_o_pcie_pkt_wr_data after the get is 00006a8e056c1fde6a8e056c1fde34bb2610f33f7e7f6905f018bf9d8385d82e

I would like to truncate the 4 leading 0s.

Is there any function call or any other automatic way to do it? Otherwise, I would have to detect number of leading 0s and bit shift them out or manipulate some other way.

Thank you.

6

In reply to UVM_learner6:

For a packed vector, just use the $clog2 system function to give yourself the bit position of the highest ‘1’. Work from there.
i.e.

bit [ 3 : 0 ] [ 63 : 0 ] long_vector = 'h00006a8e056c1fde6a8e056c1fde34bb2610f33f7e7f6905f018bf9d8385d82e;

int index_highest_onebit;
initial index_highest_onebit = $clog2( long_vector );

Regards,
Mark