In reply to dave_59:
Quote:
In reply to UVM_learner6:
I'm not sure what you mean by "read out". Variables in digital logic have a fixed number of binary digits. Each digit must be a 0 or 1. If by read out you mean $display, then the "%0h" display formant suppresses the 2 leading 0's, and "%0b" would suppress 9 leading 0's.
Thanks Dave. What I mean is :
I have an analysis fifo.
uvm_tlm_analysis_fifo #(mtu_out_seq_item) mtu_out_fifo;
I read data from the fifo 4 times using this :
mtu_out_fifo.get(dout_tx);
I concatenate the 4 readouts like this :
full_256b_o_pcie_pkt_wr_data = {fourth_64b_o_pcie_pkt_wr_data, third_64b_o_pcie_pkt_wr_data, second_64b_o_pcie_pkt_wr_data, first_64b_o_pcie_pkt_wr_data};
In this "full_256b_o_pcie_pkt_wr_data", if I get data that has leading 0s like this :
full_256b_o_pcie_pkt_wr_data after the get is 00006a8e056c1fde6a8e056c1fde34bb2610f33f7e7f6905f018bf9d8385d82e
I would like to truncate the 4 leading 0s.
Is there any function call or any other automatic way to do it? Otherwise, I would have to detect number of leading 0s and bit shift them out or manipulate some other way.
Thank you.
