SystemVeriog Checkers

Hi, I’m a newbie to verification. I am testing the different scopes of verification in SV.
I have this piece of code testing Checkers. However it’s not running in EDAplaground. I am not sure if the problem is from the tool or something is wrong with the code. Can somebody please check it for me. Here is the link to EP checker.sv I’m running using VCS

In reply to laureen.giac:

The checker construct in SystemVerilog is relatively new, and the tool versions on EDAPlayground are relatively old. The first thing that I see wrong is that you put your checker inside a module and tried to instantiate it into another module. You should be putting your checker in a package and import the package.

In reply to dave_59:

“You should be putting your checker in a package and import the package.”
… Or bind the checker to the desired module.
Ben Ben@systemverilog.us

Thanks Dave and Ben :)