SYSTEM VERILOG packet transmission

SystemVerilog
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1

i have to create a packet consist of 3 dynamic array arrays a,b and c such that each of 8 bit and size between 15 to 25.
the value in the arrays is 1 to 200.
the values in array a and b must not be same and the result of the values of a and b array must be saved in c array but in reverse order.
the odd numbers and not used in first array and the even numbers are used in second array.
this has to be done my randomization

2 


// Code your testbench here
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// I have to create a packet consist of 3 dynamic array arrays a,b and c such that each of 8 bit and size between 15 to 25.
//the value in the arrays is 1 to 200.
//the values in array a and b must not be same and the result of the values of a and b array must be saved in c array but in reverse order.
//the odd numbers and not used in first array and the even numbers are used in second array.
//this has to be done my randomization
module tb;
class Packet;
  rand bit [7:0] a[],b[],c[];
  
  constraint size_abc {a.size inside {[15:25]};b.size inside {[15:25]};
                       c.size inside {[15:25]} ;}
  
  
  
  constraint value_a { foreach (a[i])
    a[i] inside {[1:100]};}
  
  constraint value_a_even {foreach (a[i])
   a[i]%2==0;}
  
  
  constraint value_b { foreach (b[i])
    b[i] inside {[1:100]};}
  
  constraint value_a_odd {foreach (b[i])
    b[i]%2!=0;}
  
  function void post_randomize();
    c = {a, b};
    c.reverse();
  endfunction

  endclass

initial begin
  Packet p1;
  p1 = new();
  if (!p1.randomize()) begin
    $display ("Randomization Error");
  end
  
  $display ("Value of array A is %p",p1.a);
  $display ("Value of array B is %p",p1.b);
  $display ("Value of array C is %p",p1.c);
  
end
endmodule