I am trying to write an assertion which says.
when signal(data_en) is asserted. within 100us signal(data_ack) should be asserted. both the signal are synced to the posedge of clk.
I have tried below code
property clk_p (int time_period);
($rose(data_en),current_time=$time) |=> ##[1:$]($rose(data_ack) ##0 (time_period<= $time - current_time));
some how it didn't work as expected. $time(right side) didn't work properly.
all the suggestion are welcome.