System verilog

How to generate a random number without using rand and randc

In reply to harinathdigital@gmail.com:

Try the system functions:


$urandom(seed)
$urandom_range(maxval,minval) 

The functions will returns a 32-bit random number. (See IEEE Standard for Systemverilog - Section 18.13.1 & Section 18.13.1)