Dear SV forum,
I am wondering where can I find some resources (articles, books, …) regarding design using array of interfaces ?
Thanks
In reply to jamalel:
There are a number of resources available for learning about the use of arrays of interfaces in SystemVerilog. Here are a few possibilities to get you started:
IEEE Std 1800-2017 SystemVerilog LRM (Language Reference Manual): This document is considered as the official specification for the SystemVerilog language and it provides a detailed description of the language features, including arrays of interfaces. You can find it online for free or you can buy a hardcopy.
Books: There are several books that cover the topic of SystemVerilog, and many of them include information on arrays of interfaces. Some popular books on the subject include “SystemVerilog for Design” by Chris Spear and “Advanced Digital Design with the Verilog HDL” by Michael D. Ciletti.
Online tutorials and articles: There are many online tutorials and articles that cover the topic of arrays of interfaces in SystemVerilog. A quick search on the internet will give you many options to choose from.
Online forums and communities: There are several online forums and communities dedicated to SystemVerilog, where you can ask for help and advice on using arrays of interfaces. Some popular forums include the SystemVerilog section of EDAboard and the SystemVerilog sub-reddit.
Online courses: There are many online courses available that cover SystemVerilog, with some of them discussing arrays of interfaces, like the course from Udemy “SystemVerilog for Design and Verification” by Yatin Trivedi.
I hope you find these resources helpful. Remember that the best way to learn is to practice, so try experimenting with arrays of interfaces in your own design projects.