Hi ,
I have following code :: Code
Via +define+ADD I tried to test what happens if a user inadvertently drives signals declared with input direction in modport and clocking block.
I observe all tools throw an error when driving signals ' out ' and ' ack ' declared as input within the clocking block however
only 1 tool throws an error when driving signals ' a ' and ' b ' declared as input within modport RTL .
[Q1] Are input signals within modport legal to be driven as per LRM ?
Within modport TB I have added clocking block ' cb ' .
[Q2] If user wants to drive output signal ' a ' within ' cb ' via modport TB what's the correct way ?
Should it be inf.TB.cb.a <= 5 ; OR inf.cb.a <= 5 ; ?
[Q3] Are modport meant for RTL designs only ? Can it be used for Testbench as well ?
Similarly are clocking blocks meant only for Testbench ?
[Q4] Direction of signals can be defined within clocking blocks as well as modports .
So what's the point of adding a clocking block to a modport ?
Is it to add a relative timing of reading / writing these signals ?
Asynchronous signals ( Eg: Asynchronous Reset ) aren't related to clock .
Hence these signals aren't part of clocking block and are added to modport directly .
[Q5] Output Signals of a clocking block ( clockvar ) are driven using <= .
Does the update occur in NBA region OR Re-NBA region ?
