My dut has one input port and three ouput ports. Now, I am sending data(a,b,c,d,...) to DUT.
And data will come from output1,2,3 in order. it does not matter which output port that data come from.
Ex:output1:a,output2:b,output3:c OR output1:b,output2:a,output3:c at time
rq_1,2,3 are used to store the output data from output1,2,3.
And then I use merge_rq to collect the data from rq_1,2,3 for comparing data in wq.
Now,I am facing a problem. Since, the data can go to any one of three output ports. the first data store in rq_1 can
be a or b or c. Therefore, the order of merge_rq is not same as wq. So, using this method to compare data does not work.
Do you have some suggestions for this case?