Question regarding transport and inertial delay

SystemVerilog
, ,
1

Hi,

While going through Sutherland paper I came across the waveform in the link below. In the waveform, I don’t understand why O5 is not same as O6. In the case of O5, the ‘in’ signal goes high at 30 sec which should be captured at 30 sec and should be assigned after 5sec which is seen in the waveform. But at 33 sec the in value goes low which should be captured at 33 sec and should be assigned after 5sec which I don’t see. Can someone explain this? Is it because since its a blocking assignment the always block won’t be triggered at 33 sec when ‘in’ value changes?

waveform image

Thanks

2

In reply to sj1992:

You answered your own question. It might help to re-write the always block as

always begin
          @in;
          tmp = in;
          #5;
          o5 = tmp;
       end
3

In reply to dave_59:

Thanks for the clarification, Dave. Does this mean we don’t see transport delay in case of blocking assignments?